[X86] Add zero idioms to the haswell, broadwell, and skylake schedule models. Add...

[X86] Add zero idioms to the haswell, broadwell, and skylake schedule models. Add 256-bit fp xor to sandybridge zero idioms

This copies the Sandy Bridge zero idiom support to later CPUs. Adding the AVX2 and AVX512F/VL instructions as appropriate.

Differential Revision: https://reviews.llvm.org/D62360

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361690 91177308-0d34-0410-b5e6-96231b3b80d8