]> granicus.if.org Git - llvm/commit
Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.
authorMichael Kruse <llvm@meinersbur.de>
Thu, 20 Dec 2018 04:58:07 +0000 (04:58 +0000)
committerMichael Kruse <llvm@meinersbur.de>
Thu, 20 Dec 2018 04:58:07 +0000 (04:58 +0000)
commit42a382c20406d2745124f8decbfa98403b1553b6
tree079ed57c599a858a5045f5480b179dacfe6c74fd
parent347590f8fc8ff798897ec8f06e0e63841a8abfa8
Introduce llvm.loop.parallel_accesses and llvm.access.group metadata.

The current llvm.mem.parallel_loop_access metadata has a problem in that
it uses LoopIDs. LoopID unfortunately is not loop identifier. It is
neither unique (there's even a regression test assigning the some LoopID
to multiple loops; can otherwise happen if passes such as LoopVersioning
make copies of entire loops) nor persistent (every time a property is
removed/added from a LoopID's MDNode, it will also receive a new LoopID;
this happens e.g. when calling Loop::setLoopAlreadyUnrolled()).
Since most loop transformation passes change the loop attributes (even
if it just to mark that a loop should not be processed again as
llvm.loop.isvectorized does, for the versioned and unversioned loop),
the parallel access information is lost for any subsequent pass.

This patch unlinks LoopIDs and parallel accesses.
llvm.mem.parallel_loop_access metadata on instruction is replaced by
llvm.access.group metadata. llvm.access.group points to a distinct
MDNode with no operands (avoiding the problem to ever need to add/remove
operands), called "access group". Alternatively, it can point to a list
of access groups. The LoopID then has an attribute
llvm.loop.parallel_accesses with all the access groups that are parallel
(no dependencies carries by this loop).

This intentionally avoid any kind of "ID". Loops that are clones/have
their attributes modifies retain the llvm.loop.parallel_accesses
attribute. Access instructions that a cloned point to the same access
group. It is not necessary for each access to have it's own "ID" MDNode,
but those memory access instructions with the same behavior can be
grouped together.

The behavior of llvm.mem.parallel_loop_access is not changed by this
patch, but should be considered deprecated.

Differential Revision: https://reviews.llvm.org/D52116

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@349725 91177308-0d34-0410-b5e6-96231b3b80d8
40 files changed:
docs/LangRef.rst
include/llvm/Analysis/LoopInfo.h
include/llvm/Analysis/LoopInfoImpl.h
include/llvm/Analysis/VectorUtils.h
include/llvm/IR/LLVMContext.h
include/llvm/Transforms/Utils/LoopUtils.h
lib/Analysis/LoopInfo.cpp
lib/Analysis/VectorUtils.cpp
lib/IR/LLVMContext.cpp
lib/Transforms/InstCombine/InstCombineCalls.cpp
lib/Transforms/InstCombine/InstCombineLoadStoreAlloca.cpp
lib/Transforms/InstCombine/InstCombinePHI.cpp
lib/Transforms/Scalar/GVNHoist.cpp
lib/Transforms/Scalar/LoopVersioningLICM.cpp
lib/Transforms/Scalar/MemCpyOptimizer.cpp
lib/Transforms/Scalar/SROA.cpp
lib/Transforms/Scalar/Scalarizer.cpp
lib/Transforms/Utils/InlineFunction.cpp
lib/Transforms/Utils/Local.cpp
lib/Transforms/Utils/LoopUtils.cpp
lib/Transforms/Utils/SimplifyCFG.cpp
test/Analysis/LoopInfo/annotated-parallel-complex.ll [new file with mode: 0644]
test/Analysis/LoopInfo/annotated-parallel-simple.ll [new file with mode: 0644]
test/ThinLTO/X86/lazyload_metadata.ll
test/Transforms/Inline/parallel-loop-md-callee.ll [new file with mode: 0644]
test/Transforms/Inline/parallel-loop-md-merge.ll [new file with mode: 0644]
test/Transforms/Inline/parallel-loop-md.ll
test/Transforms/InstCombine/intersect-accessgroup.ll [new file with mode: 0644]
test/Transforms/InstCombine/loadstore-metadata.ll
test/Transforms/InstCombine/mem-par-metadata-memcpy.ll
test/Transforms/LoopVectorize/X86/force-ifcvt.ll
test/Transforms/LoopVectorize/X86/parallel-loops-after-reg2mem.ll
test/Transforms/LoopVectorize/X86/parallel-loops.ll
test/Transforms/LoopVectorize/X86/pr34438.ll
test/Transforms/LoopVectorize/X86/vect.omp.force.ll
test/Transforms/LoopVectorize/X86/vect.omp.force.small-tc.ll
test/Transforms/LoopVectorize/X86/vector_max_bandwidth.ll
test/Transforms/SROA/mem-par-metadata-sroa.ll
test/Transforms/Scalarizer/basic.ll
test/Transforms/SimplifyCFG/combine-parallel-mem-md.ll