[ARM, Asm] Harden GNU LDRD/STRD aliases against invalid inputs

[ARM, Asm] Harden GNU LDRD/STRD aliases against invalid inputs

Previously, the code that implemented the GNU assembler aliases for the
LDRD and STRD instructions (where the second register is omitted)
assumed that the input was a valid instruction. This caused assertion
failures for every example in ldrd-strd-gnu-bad-inst.s.

This improves this code so that it bails out if the instruction is not
in the expected format, the check bails out, and the asm parser is run
on the unmodified instruction.

It also relaxes the alias on thumb targets, so that unaligned pairs of
registers can be used. The restriction that Rt must be even-numbered
only applies to the ARM versions of these instructions.

Differential revision: https://reviews.llvm.org/D36732

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315305 91177308-0d34-0410-b5e6-96231b3b80d8