]> granicus.if.org Git - llvm/commit
[GISel]: Enhance the MachineIRBuilder API
authorAditya Nandakumar <aditya_nandakumar@apple.com>
Thu, 6 Jul 2017 19:40:07 +0000 (19:40 +0000)
committerAditya Nandakumar <aditya_nandakumar@apple.com>
Thu, 6 Jul 2017 19:40:07 +0000 (19:40 +0000)
commit3c86b1705ba5218034c0cf450103bc49d63f846b
tree470e9fcaadd1dcf17aab4ec0ec213fa3b6b7f7d3
parent73886a60d8ec35cabc56cb81b755a16b842e395b
[GISel]: Enhance the MachineIRBuilder API

Allows the MachineIRBuilder APIs to directly create registers (based on
LLT or TargetRegisterClass) as well as accept MachineInstrBuilders
and implicitly converts to register(with getOperand(0).getReg()).

Eg usage:
LLT s32 = LLT::scalar(32);
auto C32 = Builder.buildConstant(s32, 32);
auto Tmp = Builder.buildInstr(TargetOpcode::G_SUB, s32, C32,
OtherReg);
auto Tmp2 = Builder.buildInstr(Opcode, DstReg,
Builder.buildConstant(s32, 31)); ....

Only a few methods added for now.

Reviewed by Tim

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@307302 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/CodeGen/GlobalISel/MachineIRBuilder.h
lib/Target/AArch64/AArch64LegalizerInfo.cpp