]> granicus.if.org Git - esp-idf/commit
bootloader: disconnect VRTC from SAR input in bootloader_random_disable
authorIvan Grokhotkov <ivan@espressif.com>
Tue, 21 Feb 2017 04:10:49 +0000 (12:10 +0800)
committerIvan Grokhotkov <ivan@espressif.com>
Tue, 21 Feb 2017 09:07:15 +0000 (17:07 +0800)
commit3b583c150f672f7414b9c35b84d219237a2d4afb
tree7f0574e18d8525d1be4b1e53fc3f9d473952b717
parent1405fd1fefe708368b8db856846532ca74e2aa5c
bootloader: disconnect VRTC from SAR input in bootloader_random_disable

Bootloader enables SAR ADC in test mode to get some entropy for the RNG.
The bits which control the ADC test mux were not disabled, which caused
extra ~24uA current to be drawn from VRTC, increasing deep sleep current
consumption. This change disables relevant test mode bits in
bootloader_random_disable.
components/bootloader_support/src/bootloader_random.c