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[ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP
authorOliver Stannard <oliver.stannard@arm.com>
Wed, 1 Oct 2014 09:03:02 +0000 (09:03 +0000)
committerOliver Stannard <oliver.stannard@arm.com>
Wed, 1 Oct 2014 09:03:02 +0000 (09:03 +0000)
commit3a8811e15fbf1f7493387bfe24fb8f1a110955fa
tree9f14be53b721280a468f28d4d37e5eeb5c947368tree | snapshot
parent2dfdada16c683364c11fc90b05157163878e2eb9commit | diff
[ARM] Add support for Cortex-M7, FPv5-SP and FPv5-DP

The Cortex-M7 has 3 options for its FPU: none, FPv5-SP-D16 and
FPv5-DP-D16. FPv5 has the same instructions as FP-ARMv8, so it can be
modeled using the same target feature, and all double-precision
operations are already disabled by the fp-only-sp target features.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@218748 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Basic/Targets.cpp diff | blob | history
lib/Driver/ToolChains.cpp diff | blob | history
lib/Driver/Tools.cpp diff | blob | history
test/Driver/arm-cortex-cpus.c diff | blob | history
test/Driver/arm-mfpu.c diff | blob | history
test/Preprocessor/arm-target-features.c diff | blob | history
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