[ARM] Tighten up VLDRH.32 with low alignments

[ARM] Tighten up VLDRH.32 with low alignments

VLDRH needs to have an alignment of at least 2, including the
widening/narrowing versions. This tightens up the ISel patterns for it and
alters allowsMisalignedMemoryAccesses so that unaligned accesses are expanded
through the stack. It also fixed some incorrect shift amounts, which seemed to
be passing a multiple not a shift.

Differential Revision: https://reviews.llvm.org/D65580

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@368256 91177308-0d34-0410-b5e6-96231b3b80d8