]> granicus.if.org Git - llvm/commit
[X86][AVX] Enable INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)) shuffle combining
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 2 Feb 2019 18:08:04 +0000 (18:08 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Sat, 2 Feb 2019 18:08:04 +0000 (18:08 +0000)
commit38d80518304d8e206489215a29f2c9c54b594cd4
tree8eb64d8636d710b209d9a340052719fbf33347df
parent5893e44c14b9b0dea6ba1d7786ab80b405dfd883
[X86][AVX] Enable INSERT_SUBVECTOR(SRC0, SHUFFLE(SRC1)) shuffle combining

Push the insert_subvector up through the shuffle operands to help find more cross-lane shuffles.

The is exposes a couple of minor issues that will be fixed shortly:
Missed broadcast folds - we have a mixture of vzext_load lengths that need cleaning up
combine-sdiv.ll - AVX1 SimplifyDemandedVectorElts failure (hits max depth due to a couple of extra bitcasts).

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@352963 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelLowering.cpp
test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
test/CodeGen/X86/avx512-shuffles/partial_permute.ll
test/CodeGen/X86/combine-sdiv.ll
test/CodeGen/X86/subvector-broadcast.ll
test/CodeGen/X86/vector-reduce-mul-widen.ll
test/CodeGen/X86/vector-reduce-mul.ll
test/CodeGen/X86/vector-shuffle-256-v16.ll
test/CodeGen/X86/vector-shuffle-256-v8.ll
test/CodeGen/X86/vector-shuffle-avx512.ll
test/CodeGen/X86/widened-broadcast.ll