]> granicus.if.org Git - llvm/commit
projects / llvm / commit
? search:
summary | shortlog | log | commit | commitdiff | tree
(parent: b76c453) | patch
[AArch64][SVE] Asm: Support for insert element (INSR) instructions.
authorSander de Smalen <sander.desmalen@arm.com>
Fri, 13 Jul 2018 08:51:57 +0000 (08:51 +0000)
committerSander de Smalen <sander.desmalen@arm.com>
Fri, 13 Jul 2018 08:51:57 +0000 (08:51 +0000)
commit3723787cc35f90881c09838b799bd7965b05cb8f
tree2eee113636128e875f142b0fc7168f17bf09d7d4tree | snapshot
parentb76c4539710da72f5faa43048edd396f8eb99d26commit | diff
[AArch64][SVE] Asm: Support for insert element (INSR) instructions.

Insert general purpose register into shifted vector, e.g.
  insr    z0.s, w0
  insr    z0.d, x0

Insert SIMD&FP scalar register into shifted vector, e.g.
  insr    z0.b, b0
  insr    z0.h, h0
  insr    z0.s, s0
  insr    z0.d, d0

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336979 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AArch64/AArch64SVEInstrInfo.td diff | blob | history
lib/Target/AArch64/SVEInstrFormats.td diff | blob | history
test/MC/AArch64/SVE/insr-diagnostics.s [new file with mode: 0644] blob
test/MC/AArch64/SVE/insr.s [new file with mode: 0644] blob
Unnamed repository; edit this file 'description' to name the repository.