]> granicus.if.org Git - llvm/commit
[X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract...
authorCraig Topper <craig.topper@intel.com>
Fri, 16 Aug 2019 04:47:44 +0000 (04:47 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 16 Aug 2019 04:47:44 +0000 (04:47 +0000)
commit338d0f7a28c1075442a7b4f51a68b620c85c4720
tree45e810de61467398cc2087a418294cbfe647e82b
parent9cd6fac1ec4543da038ee6a523da6a2d8aa1adb9
[X86] Manually reimplement getTargetInsertSubreg in X86DAGToDAGISel::matchBitExtract so we can call insertDAGNode on the target constant.

This is needed to maintain the topological sort order.

Fixes PR42992.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369084 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86ISelDAGToDAG.cpp
test/CodeGen/X86/pr42992.ll [new file with mode: 0644]