]> granicus.if.org Git - llvm/commit
AMDGPU: Move d16 load matching to preprocess step
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 8 Mar 2019 20:58:11 +0000 (20:58 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 8 Mar 2019 20:58:11 +0000 (20:58 +0000)
commit30e4d4186124bf91eed8da68aeab77f2b42b8218
tree4d2b619d9ed4cee0bc47fb334bd5b08259fb55fe
parented120704215ed838a59314a8e7dfe244656a261c
AMDGPU: Move d16 load matching to preprocess step

When matching half of the build_vector to a load, there could still be
a hidden dependency on the other half of the build_vector the pattern
wouldn't detect. If there was an additional chain dependency on the
other value, a cycle could be introduced.

I don't think a tablegen pattern is capable of matching the necessary
conditions, so move this into PreprocessISelDAG. Check isPredecessorOf
for the other value to avoid a cycle. This has a warning that it's
expensive, so this should probably be moved into an MI pass eventually
that will have more freedom to reorder instructions to help match
this. That is currently complicated by the lack of a computeKnownBits
type mechanism for the selected function.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@355731 91177308-0d34-0410-b5e6-96231b3b80d8
13 files changed:
lib/Target/AMDGPU/AMDGPU.td
lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
lib/Target/AMDGPU/AMDGPUISelLowering.cpp
lib/Target/AMDGPU/AMDGPUISelLowering.h
lib/Target/AMDGPU/AMDGPUInstructions.td
lib/Target/AMDGPU/AMDGPUSubtarget.h
lib/Target/AMDGPU/BUFInstructions.td
lib/Target/AMDGPU/DSInstructions.td
lib/Target/AMDGPU/FLATInstructions.td
lib/Target/AMDGPU/SIInstrInfo.td
test/CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
test/CodeGen/AMDGPU/chain-hi-to-lo.ll
test/CodeGen/AMDGPU/load-hi16.ll