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(parent: f0b2742) | patch
Adds code to PPC ISEL lowering to recognize half-word inserts from vector_shuffles...
authorGraham Yiu <gyiu@ca.ibm.com>
Wed, 1 Nov 2017 18:06:56 +0000 (18:06 +0000)
committerGraham Yiu <gyiu@ca.ibm.com>
Wed, 1 Nov 2017 18:06:56 +0000 (18:06 +0000)
commit3031a585fbf4a10174a14192eaeeaa96fdd0e6a2
treefbf87618f86c431a979246ca1e5133953d3ad2bbtree | snapshot
parentf0b2742b3d6b74d199a7eaebc2c55dc0b79d0cc7commit | diff
Adds code to PPC ISEL lowering to recognize half-word inserts from vector_shuffles, and use P9 shift and vector insert instructions instead of vperm.

Differential Revision: https://reviews.llvm.org/D34160

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317111 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelLowering.cpp diff | blob | history
lib/Target/PowerPC/PPCISelLowering.h diff | blob | history
lib/Target/PowerPC/PPCInstrAltivec.td diff | blob | history
test/CodeGen/PowerPC/p9-vinsert-vextract.ll [new file with mode: 0644] blob
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