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(parent: 61fd1c0) | patch
[AVX512] Use alignedstore256 in a pattern that's emitting a 256-bit movaps from an...
authorCraig Topper <craig.topper@intel.com>
Sat, 19 Aug 2017 22:02:02 +0000 (22:02 +0000)
committerCraig Topper <craig.topper@intel.com>
Sat, 19 Aug 2017 22:02:02 +0000 (22:02 +0000)
commit2d1cd3c597b203abc0cbafed793cc833700ba9bd
tree5df66483bdc8484a8baf1f7884ca0d43fed213dctree | snapshot
parent61fd1c077cf202ae1e39182239a6769c8f2420dfcommit | diff
[AVX512] Use alignedstore256 in a pattern that's emitting a 256-bit movaps from an extract subvector operation.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@311263 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/X86/X86InstrAVX512.td diff | blob | history
test/CodeGen/X86/avx512-extract-subvector.ll diff | blob | history
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