]> granicus.if.org Git - llvm/commit
[PowerPC] Support extended mnemonics mffprwz etc.
authorJinsong Ji <jji@us.ibm.com>
Thu, 29 Aug 2019 21:53:59 +0000 (21:53 +0000)
committerJinsong Ji <jji@us.ibm.com>
Thu, 29 Aug 2019 21:53:59 +0000 (21:53 +0000)
commit29cadc9c4ce1ebb00ff2c164f15c2e13d4bbf3ea
tree97201ef50103aa8ef4d781bdd23ce8d5fdd5ce7c
parent5d27af8ddc107cd5ce4ec04251f5c20fcd76a471
[PowerPC] Support extended mnemonics mffprwz etc.

Summary:
Reported in https://github.com/opencv/opencv/issues/15413.

We have serveral extended mnemonics for Move To/From Vector-Scalar Register Instructions
eg: mffprd,mtfprd etc.

We only support one of them, this patch add the others.

Reviewers: nemanjai, steven.zhang, hfinkel, #powerpc

Reviewed By: hfinkel

Subscribers: wuzish, qcolombet, hiraditya, kbarton, MaskRay, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66963

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370411 91177308-0d34-0410-b5e6-96231b3b80d8
22 files changed:
lib/Target/PowerPC/P9InstrResources.td
lib/Target/PowerPC/PPCInstrVSX.td
test/CodeGen/PowerPC/bitcasts-direct-move.ll
test/CodeGen/PowerPC/builtins-ppc-p9-f128.ll
test/CodeGen/PowerPC/direct-move-profit.ll
test/CodeGen/PowerPC/fp-int-conversions-direct-moves.ll
test/CodeGen/PowerPC/fp64-to-int16.ll
test/CodeGen/PowerPC/gpr-vsr-spill.ll
test/CodeGen/PowerPC/inlineasm-extendedmne.ll [new file with mode: 0644]
test/CodeGen/PowerPC/ppc64-align-long-double.ll
test/CodeGen/PowerPC/pr26180.ll
test/CodeGen/PowerPC/pr31144.ll
test/CodeGen/PowerPC/select-addrRegRegOnly.ll
test/CodeGen/PowerPC/setrnd.ll
test/CodeGen/PowerPC/store_fptoi.ll
test/CodeGen/PowerPC/uint-to-fp-v4i32.ll
test/CodeGen/PowerPC/uint-to-ppcfp128-crash.ll
test/CodeGen/PowerPC/vec_conv_fp64_to_i32_elts.ll
test/CodeGen/PowerPC/vec_conv_i16_to_fp32_elts.ll
test/CodeGen/PowerPC/vec_conv_i8_to_fp32_elts.ll
test/MC/Disassembler/PowerPC/vsx.txt
test/MC/PowerPC/vsx.s