[RISCV] Lower inline asm constraints I, J & K for RISC-V

[RISCV] Lower inline asm constraints I, J & K for RISC-V

This validates and lowers arguments to inline asm nodes which have the
constraints I, J & K, with the following semantics (equivalent to GCC):

I: Any 12-bit signed immediate.
J: Immediate integer zero only.
K: Any 5-bit unsigned immediate.

Differential Revision: https://reviews.llvm.org/D54093

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@363054 91177308-0d34-0410-b5e6-96231b3b80d8