]> granicus.if.org Git - llvm/commit
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits
authorSanjay Patel <spatel@rotateright.com>
Wed, 19 Apr 2017 21:23:09 +0000 (21:23 +0000)
committerSanjay Patel <spatel@rotateright.com>
Wed, 19 Apr 2017 21:23:09 +0000 (21:23 +0000)
commit27b613382c6577b8282a11db87c2d99b49cf238e
tree02f7ba952785ecd96c2f3c069a241fb6e367da05
parented95c621a6dfc2f06a11ff507ea9f26848a60082
[DAG] add splat vector support for 'xor' in SimplifyDemandedBits

This allows forming more 'not' ops, so we get improvements for ISAs that have and-not.

Follow-up to:
https://reviews.llvm.org/rL300725

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@300763 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/SelectionDAG/DAGCombiner.cpp
lib/CodeGen/SelectionDAG/TargetLowering.cpp
test/CodeGen/ARM/vbits.ll
test/CodeGen/PowerPC/andc.ll
test/CodeGen/X86/avx-logic.ll
test/CodeGen/X86/avx512-mask-op.ll
test/CodeGen/X86/i64-to-float.ll