]> granicus.if.org Git - llvm/commit
[llvm-exegesis] Allow the target to disable the selection of some registers.
authorClement Courbet <courbet@google.com>
Tue, 26 Mar 2019 15:44:57 +0000 (15:44 +0000)
committerClement Courbet <courbet@google.com>
Tue, 26 Mar 2019 15:44:57 +0000 (15:44 +0000)
commit2626e5e9d3613f8cb65787659a98876860bb7fb6
treead45fd9647132c7a5f6f7ea53513293096620b3f
parentb9eb67aedbf7daa571d9fcbea19752f6f3d3ce63
[llvm-exegesis] Allow the target to disable the selection of some registers.

Summary:
This prevents "Cannot encode high byte register in REX-prefixed instruction"
from happening on instructions that require REX encoding when AH & co
get selected.
On the down side, these 4 registers can no longer be selected
automatically, but this avoids having to expose all the X86 encoding
complexity.

Reviewers: gchatelet

Subscribers: tschuett, jdoerfert, llvm-commits, bdb

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D59821

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357003 91177308-0d34-0410-b5e6-96231b3b80d8
test/tools/llvm-exegesis/X86/latency-SBB8rr.s [new file with mode: 0644]
tools/llvm-exegesis/lib/LlvmState.cpp
tools/llvm-exegesis/lib/Target.h
tools/llvm-exegesis/lib/X86/Target.cpp
unittests/tools/llvm-exegesis/X86/TargetTest.cpp