]> granicus.if.org Git - llvm/commit
[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load
authorPetar Avramovic <Petar.Avramovic@rt-rk.com>
Mon, 8 Jul 2019 14:45:52 +0000 (14:45 +0000)
committerPetar Avramovic <Petar.Avramovic@rt-rk.com>
Mon, 8 Jul 2019 14:45:52 +0000 (14:45 +0000)
commit25e728d48d11c4627d301b87a8bbb3a427d94e31
tree5f0215f3d2dc2555a9da028dbe2dcabfb4820777
parentd43c943215bd41b1f496315f4fb646899d7c4ac9
[MIPS GlobalISel] Register bank select for G_LOAD. Select i64 load

Select gprb or fprb when loaded value is used by either:
 copy to physical register or
 instruction with only one mapping available for that use operand.

Load of integer s64 is handled with narrowScalar when mapping is applied,
produced artifacts are combined away. Manually set gprb to all register
operands of instructions created during narrowScalar.

Differential Revision: https://reviews.llvm.org/D64269

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@365323 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/MipsLegalizerInfo.cpp
lib/Target/Mips/MipsRegisterBankInfo.cpp
lib/Target/Mips/MipsRegisterBankInfo.h
test/CodeGen/Mips/GlobalISel/legalizer/load.mir [new file with mode: 0644]
test/CodeGen/Mips/GlobalISel/llvm-ir/load.ll [new file with mode: 0644]
test/CodeGen/Mips/GlobalISel/regbankselect/load.mir [new file with mode: 0644]