]> granicus.if.org Git - llvm/commit
[AMDGPU] Move SiShrinkInstruction and SDWAPeephole to SSAOptimization passes
authorSam Kolton <Sam.Kolton@amd.com>
Fri, 7 Apr 2017 10:53:12 +0000 (10:53 +0000)
committerSam Kolton <Sam.Kolton@amd.com>
Fri, 7 Apr 2017 10:53:12 +0000 (10:53 +0000)
commit218a5a7e27dcaa53ae6703c40a044faf52e63f12
treed24d4cf6edf2c1a7c2f99154232b0ca4945bf06f
parentaa39cd364debbeae33c108fd2b12926d33122c2c
[AMDGPU] Move SiShrinkInstruction and SDWAPeephole to SSAOptimization passes

Summary:
Difference beetween PreRegAlloc() and MachineSSAOptimization() are that the former is run despite of -O0 optimization level. In my undestanding SiShrinkInstructions and SDWAPeephole shouldn't run when optimizations are disabled.
With this change order of passes will not change.

Reviewers: arsenm, vpykhtin, rampitec

Subscribers: qcolombet, kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye

Differential Revision: https://reviews.llvm.org/D31705

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299757 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
test/CodeGen/AMDGPU/llvm.dbg.value.ll
test/CodeGen/AMDGPU/partial-sgpr-to-vgpr-spills.ll