]> granicus.if.org Git - llvm/commit
[RegBankSelect] Support REG_SEQUENCE for generic mapping
authorQuentin Colombet <qcolombet@apple.com>
Sat, 1 Apr 2017 01:26:14 +0000 (01:26 +0000)
committerQuentin Colombet <qcolombet@apple.com>
Sat, 1 Apr 2017 01:26:14 +0000 (01:26 +0000)
commit209e8f27d259f566e623d7f6ad636dd68ee0a3b5
tree7f28ad77851895684dac9df6e77bea0e8082f206
parent9ca9c4340dc66009c91f6fdf698fa190af7006e4
[RegBankSelect] Support REG_SEQUENCE for generic mapping

REG_SEQUENCE falls into the same category as COPY for operands mapping:
- They don't have MCInstrDesc with register constraints
- The input variable could use whatever register classes
- It is possible to have register class already assigned to the operands

In particular, given REG_SEQUENCE are always target specific because of
the subreg indices. Those indices must apply to the register class of
the definition of the REG_SEQUENCE and therefore, the target must set a
register class to that definition. As a result, the generic code can
always use that register class to derive a valid mapping for a
REG_SEQUENCE.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@299285 91177308-0d34-0410-b5e6-96231b3b80d8
lib/CodeGen/GlobalISel/RegisterBankInfo.cpp
test/CodeGen/AArch64/GlobalISel/regbankselect-reg_sequence.mir [new file with mode: 0644]