]> granicus.if.org Git - llvm/commit
Merging r246675:
authorTom Stellard <thomas.stellard@amd.com>
Mon, 9 Nov 2015 16:25:06 +0000 (16:25 +0000)
committerTom Stellard <thomas.stellard@amd.com>
Mon, 9 Nov 2015 16:25:06 +0000 (16:25 +0000)
commit1cd4501afe5351aaca719874e85bfbf606d4ee73
tree2af46e0ecb87888ba2ef381ddb566892915e0d2e
parent6d2e5165a455384abc9a1f8c6cc240e333f544c8
Merging r246675:

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r246675 | hfinkel | 2015-09-02 12:52:37 -0400 (Wed, 02 Sep 2015) | 9 lines

[PowerPC] Don't always consider P8Altivec-only masks in LowerVECTOR_SHUFFLE

LowerVECTOR_SHUFFLE needs to decide whether to pass a vector shuffle off to the
TableGen-generated matching code, and it does this by testing the same
predicates used by the TableGen files. Unfortunately, when we added new
P8Altivec-only predicates, we started universally testing them in
LowerVECTOR_SHUFFLE, and if then matched when targeting a system prior to a P8,
we'd end up with a selection failure.

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_37@252479 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/PowerPC/PPCISelLowering.cpp
test/CodeGen/PowerPC/p8altivec-shuffles-pred.ll [new file with mode: 0644]