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AVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D
authorElena Demikhovsky <elena.demikhovsky@intel.com>
Mon, 18 May 2015 07:24:19 +0000 (07:24 +0000)
committerElena Demikhovsky <elena.demikhovsky@intel.com>
Mon, 18 May 2015 07:24:19 +0000 (07:24 +0000)
commit1c21f2ef8c87fa5e340eac331c802843ad8c78da
tree7a77af371c45f185d1959045aab66a82c3b38200tree | snapshot
parent324d41ce49c667b45effc363f03c2b564c291f5fcommit | diff
AVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D
instructions. These intrinsics are comming with rounding mode.
Added intrinsics for MAXSS/D, MINSS/D - with and without  sae.

By Asaf Badouh (asaf.badouh@intel.com)

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237560 91177308-0d34-0410-b5e6-96231b3b80d8
include/llvm/IR/IntrinsicsX86.td diff | blob | history
lib/Target/X86/X86ISelLowering.cpp diff | blob | history
lib/Target/X86/X86IntrinsicsInfo.h diff | blob | history
test/CodeGen/X86/avx512-intrinsics.ll diff | blob | history
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