]> granicus.if.org Git - llvm/commit
[x86] add test for missing vector SRA combine via computeKnownBits
authorSanjay Patel <spatel@rotateright.com>
Fri, 21 Oct 2016 23:02:31 +0000 (23:02 +0000)
committerSanjay Patel <spatel@rotateright.com>
Fri, 21 Oct 2016 23:02:31 +0000 (23:02 +0000)
commit1b0519f03d960fd8bcc90ce3744fda2d2cb7d4df
treeb634e5e594c385a02d201cdae75a0ddda74ec38f
parent902d11d34d452fe13856f6346bfa40bd3ef616da
[x86] add test for missing vector SRA combine via computeKnownBits

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@284896 91177308-0d34-0410-b5e6-96231b3b80d8
test/CodeGen/X86/combine-sra.ll