]> granicus.if.org Git - llvm/commit
Merging r270542:
authorMohit K. Bhakkad <mohit.bhakkad@gmail.com>
Wed, 25 May 2016 06:32:18 +0000 (06:32 +0000)
committerMohit K. Bhakkad <mohit.bhakkad@gmail.com>
Wed, 25 May 2016 06:32:18 +0000 (06:32 +0000)
commit1964314d4d20807a59488cc2c0a92d635b72a013
tree4395bc6252758b749c16c06228dbb502180a5c7c
parentb4c0812dfb91982f025c9abb7e4874808282ffac
Merging r270542:
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r270542 | slthakur | 2016-05-24 15:27:10 +0530 (Tue, 24 May 2016) | 9 lines

[MIPS][LLVM-MC] Fix Disassemble of Negative Offset

Patch by Nitesh Jain.

Summary: The type of Imm in MipsDisassembler.cpp was incorrect since SignExtend64 return int64_t type.As per the MIPSr6 doc ,the offset is added to the address of the instruction following the branch (not the branch itself), to form a PC-relative effective target address hence “4” is added to the offset. The offset of some test case are update to reflect the changes due to “ + 4 ” offset and new test case for negative offset are added.

Reviewers: dsanders, vkalintiris
Differential Revision: http://reviews.llvm.org/D17540

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git-svn-id: https://llvm.org/svn/llvm-project/llvm/branches/release_38@270676 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Mips/Disassembler/MipsDisassembler.cpp
test/ExecutionEngine/RuntimeDyld/Mips/ELF_N64R6_relocations.s
test/ExecutionEngine/RuntimeDyld/Mips/ELF_O32R6_relocations.s
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6-el.txt
test/MC/Disassembler/Mips/mips32r6/valid-mips32r6.txt
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6-el.txt
test/MC/Disassembler/Mips/mips64r6/valid-mips64r6.txt
test/MC/Disassembler/Mips/mips64r6/valid-xfail-mips64r6.txt