]> granicus.if.org Git - llvm/commit
[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.
authorHsiangkai Wang <hsiangkai@gmail.com>
Thu, 18 Jul 2019 14:47:34 +0000 (14:47 +0000)
committerHsiangkai Wang <hsiangkai@gmail.com>
Thu, 18 Jul 2019 14:47:34 +0000 (14:47 +0000)
commit17e3cbf5fe656483d9016d0ba9e1d0cd8629379e
tree9fbbb4f8906fa9fe79bb2e4561a858eebfdbd454
parent7dde04014c0d060be90b1c5f106fcae2274c4403
[DebugInfo] Generate fixups as emitting DWARF .debug_frame/.eh_frame.

It is necessary to generate fixups in .debug_frame or .eh_frame as
relaxation is enabled due to the address delta may be changed after
relaxation.

There is an opcode with 6-bits data in debug frame encoding. So, we
also need 6-bits fixup types.

Differential Revision: https://reviews.llvm.org/D58335

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@366442 91177308-0d34-0410-b5e6-96231b3b80d8
18 files changed:
include/llvm/DebugInfo/DWARF/DWARFDebugFrame.h
include/llvm/DebugInfo/DWARF/DWARFObject.h
include/llvm/MC/MCDwarf.h
include/llvm/MC/MCFixup.h
include/llvm/MC/MCFragment.h
lib/DebugInfo/DWARF/DWARFContext.cpp
lib/DebugInfo/DWARF/DWARFDebugFrame.cpp
lib/MC/MCAsmBackend.cpp
lib/MC/MCAssembler.cpp
lib/MC/MCDwarf.cpp
lib/Object/RelocationResolver.cpp
lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp
lib/Target/RISCV/MCTargetDesc/RISCVELFObjectWriter.cpp
test/CodeGen/RISCV/fixups-relax-diff.ll
test/DebugInfo/RISCV/dwarf-riscv-relocs.ll
test/DebugInfo/RISCV/relax-debug-frame.ll [new file with mode: 0644]
test/MC/RISCV/fde-reloc.s
tools/dsymutil/DwarfLinker.cpp