More x86 target feature support.

More x86 target feature support.
 - Apologies for the extremely gross code duplication, I want to get
   this working and then decide how to get this information out of the
   back end.

 - This replaces -m[no-]sse4[12] by -m[no-]sse4, it appears gcc
   doesn't distinguish them?

 - -msse, etc. now properly disable/enable related features.

 - Don't always define __SSE3__...

 - The main missing functionality bit here is that we don't initialize
   the features based on the CPU for all -march options.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@71117 91177308-0d34-0410-b5e6-96231b3b80d8