[ARM] Fix assembly and disassembly for VMRS/VMSR

[ARM] Fix assembly and disassembly for VMRS/VMSR

This patch addresses two issues with assembly and disassembly for VMRS/VMSR:

1.currently VMRS/VMSR instructions accessing fpsid, mvfr{0-2} and fpexc, are
  accepted for non ARMv8-A targets.

2. all VMRS/VMSR instructions accept writing/reading to PC and SP, when only
   ARMv7-A and ARMv8-A should be allowed to write/read to SP and none to PC.

This patch addresses those issues and adds tests for these cases.

Differential Revision: https://reviews.llvm.org/D36306

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@310243 91177308-0d34-0410-b5e6-96231b3b80d8