]> granicus.if.org Git - llvm/commit
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 9 Sep 2019 18:10:31 +0000 (18:10 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Mon, 9 Sep 2019 18:10:31 +0000 (18:10 +0000)
commit0bfe27be4cb0c5d746291e44bf4abd6701b61d1f
treed0e6f73d822f7e9a921cfa99b19e53dcfa0c2ad4
parent7d4736f09a0a327493d96aebf4e52d9985e6a362
AMDGPU: Use PatFrags to allow selecting custom nodes or intrinsics

This enables GlobalISel to handle various intrinsics. The custom node
pattern will be ignored, and the intrinsic will work. This will also
allow SelectionDAG to directly select the intrinsics, but as they are
all custom lowered to the nodes, this ends up leaving dead code in the
table.

Eventually either GlobalISel should add the equivalent of custom nodes
equivalent, or intrinsics should be directly used. These each have
different tradeoffs.

There are a few more to handle, but these are easy to handle
ones. Some others fail for other reasons.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371432 91177308-0d34-0410-b5e6-96231b3b80d8
16 files changed:
lib/Target/AMDGPU/AMDGPUInstrInfo.td
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.cos.s16.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.fract.s16.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.ldexp.s16.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.legacy.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rcp.s16.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.clamp.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.legacy.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.rsq.s16.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.mir [new file with mode: 0644]
test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.sin.s16.mir [new file with mode: 0644]