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(parent: b013f5d) | patch
wifi/bt coexistence: Fix disabled cache access race when writing to flash
authorAngus Gratton <angus@espressif.com>
Mon, 16 Oct 2017 11:16:20 +0000 (19:16 +0800)
committerAngus Gratton <gus@projectgus.com>
Mon, 16 Oct 2017 11:47:33 +0000 (19:47 +0800)
commit094cf4d79dac4f81f105bbc27dff7f1e6cacd6e0
tree217059324f0006d59fe86fb2c638b648d6e989aatree | snapshot
parentb013f5d49066249ecb9aebaf250fdd83d996998bcommit | diff
wifi/bt coexistence: Fix disabled cache access race when writing to flash

Moves the ets_timer_arm() / ets_timer_disarm() code paths to RAM

Overhead is 740 bytes of IRAM, 0 bytes DRAM

(For comparison: If all of esp_timer.c is moved to RAM, overhead is 1068 bytes IRAM and 480 bytes DRAM.)
components/esp32/esp_timer.c diff | blob | history
components/esp32/esp_timer_esp32.c diff | blob | history
components/esp32/ets_timer_legacy.c diff | blob | history
components/esp32/test/test_ets_timer.c diff | blob | history
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