AMDGPU: Allow additional implicit operands on MOVRELS instructions

AMDGPU: Allow additional implicit operands on MOVRELS instructions

Summary:
The post-RA scheduler occasionally uses additional implicit operands when
the vector implicit operand as a whole is killed, but some subregisters
are still live because they are directly referenced later. Unfortunately,
this seems incredibly subtle to reproduce.

Fixes piglit spec/glsl-110/execution/variable-indexing/vs-temp-array-mat2-index-wr.shader_test
and others.

Reviewers: arsenm, tstellarAMD

Subscribers: kzhuravl, wdng, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25656

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@285835 91177308-0d34-0410-b5e6-96231b3b80d8