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[Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms. Adding compare to...
authorColin LeMahieu <colinl@codeaurora.org>
Tue, 30 Dec 2014 17:39:24 +0000 (17:39 +0000)
committerColin LeMahieu <colinl@codeaurora.org>
Tue, 30 Dec 2014 17:39:24 +0000 (17:39 +0000)
commit066f43435ae586a07d30f56f033ed613625be208
tree0770727842522007c9edc187d6988647052ef2dftree | snapshot
parentaf9e1c79a58c4cf7440bd13aacc191a00dcbde6dcommit | diff
[Hexagon] Adding compare byte/halfword reg-reg/reg-imm forms.  Adding compare to general register reg-imm form.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@224991 91177308-0d34-0410-b5e6-96231b3b80d8
lib/Target/Hexagon/HexagonInstrInfoV4.td diff | blob | history
test/MC/Disassembler/Hexagon/alu32_pred.txt diff | blob | history
test/MC/Disassembler/Hexagon/xtype_pred.txt diff | blob | history
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