]> granicus.if.org Git - llvm/commit
RegScavenging: Add scavengeRegisterBackwards()
authorMatthias Braun <matze@braunis.de>
Thu, 15 Jun 2017 22:14:55 +0000 (22:14 +0000)
committerMatthias Braun <matze@braunis.de>
Thu, 15 Jun 2017 22:14:55 +0000 (22:14 +0000)
commit02688b00ef03018033c601d8d83c6baf7a596c7f
treea1761d3e246d9819885cd2d770e49c1a3d0fbcc4
parentc82adde7b97fc21bddcc396683487af5a6bb73cd
RegScavenging: Add scavengeRegisterBackwards()

Re-apply r276044/r279124. Trying to reproduce or disprove the ppc64
problems reported in the stage2 build last time, which I cannot
reproduce right now.

This is a variant of scavengeRegister() that works for
enterBasicBlockEnd()/backward(). The benefit of the backward mode is
that it is not affected by incomplete kill flags.

This patch also changes
PrologEpilogInserter::doScavengeFrameVirtualRegs() to use the register
scavenger in backwards mode.

Differential Revision: http://reviews.llvm.org/D21885

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305516 91177308-0d34-0410-b5e6-96231b3b80d8
14 files changed:
include/llvm/CodeGen/RegisterScavenging.h
lib/CodeGen/RegisterScavenging.cpp
test/CodeGen/AArch64/reg-scavenge-frame.mir
test/CodeGen/AMDGPU/attr-amdgpu-num-sgpr.ll
test/CodeGen/AMDGPU/code-object-metadata-kernel-debug-props.ll
test/CodeGen/AMDGPU/frame-index-elimination.ll
test/CodeGen/ARM/alloca-align.ll
test/CodeGen/ARM/execute-only-big-stack-frame.ll
test/CodeGen/ARM/fpoffset_overflow.mir
test/CodeGen/Mips/emergency-spill-slot-near-fp.ll
test/CodeGen/PowerPC/dyn-alloca-aligned.ll
test/CodeGen/PowerPC/scavenging.mir
test/CodeGen/Thumb/large-stack.ll
test/CodeGen/X86/scavenger.mir