]> granicus.if.org Git - llvm/commit
Fix TableGen -gen-disassembler output for bit fields with an offset.
authorCraig Topper <craig.topper@gmail.com>
Sat, 27 Sep 2014 04:38:02 +0000 (04:38 +0000)
committerCraig Topper <craig.topper@gmail.com>
Sat, 27 Sep 2014 04:38:02 +0000 (04:38 +0000)
commit00bc445d7515f3b7251261972887f5a1e3567ab9
treede185d44c6776623c5530cd96eb2dbc5e926d03a
parent676af35b385f9b39e9e874895a144fcebb1b8cd8
Fix TableGen -gen-disassembler output for bit fields with an offset.

This fixes bit assignments like this
Inst{7-0} = Foo{9-2}

Patch by Steve King.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@218560 91177308-0d34-0410-b5e6-96231b3b80d8
test/TableGen/BitOffsetDecoder.td [new file with mode: 0644]
utils/TableGen/FixedLenDecoderEmitter.cpp