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soc: fix trace memory region for single core mode
authorMahavir Jain <mahavir@espressif.com>
Wed, 15 Aug 2018 15:22:39 +0000 (20:52 +0530)
committerMahavir Jain <mahavir@espressif.com>
Wed, 15 Aug 2018 15:22:39 +0000 (20:52 +0530)
commit0075e2f316e627f9283c38ced996875ec07ff7a8
treee7f42ba54e180952550a98629c7ce62a4d2569e9tree | snapshot
parent020ade652d9b6b0b87b0bebe176a150cc4407749commit | diff
soc: fix trace memory region for single core mode

Signed-off-by: Mahavir Jain <mahavir@espressif.com>
components/soc/esp32/soc_memory_layout.c diff | blob | history
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