console/linenoise: support buffered stdout

[esp-idf] / components / spi_flash / cache_utils.c

diff --git a/components/spi_flash/cache_utils.c b/components/spi_flash/cache_utils.c
index 6da7b47e1bac43b8d9c0039068a95fdc9616f9ae..56038de37901baaac1ff5668e21050dfbabe9af5 100644 (file)
--- a/components/spi_flash/cache_utils.c
+++ b/components/spi_flash/cache_utils.c
@@ -47,18 +47,18 @@ static volatile int s_flash_op_cpu = -1;
 
 void spi_flash_init_lock()
 {
-    s_flash_op_mutex = xSemaphoreCreateMutex();
+    s_flash_op_mutex = xSemaphoreCreateRecursiveMutex();
     assert(s_flash_op_mutex != NULL);
 }
 
 void spi_flash_op_lock()
 {
-    xSemaphoreTake(s_flash_op_mutex, portMAX_DELAY);
+    xSemaphoreTakeRecursive(s_flash_op_mutex, portMAX_DELAY);
 }
 
 void spi_flash_op_unlock()
 {
-    xSemaphoreGive(s_flash_op_mutex);
+    xSemaphoreGiveRecursive(s_flash_op_mutex);
 }
 /*
  If you're going to modify this, keep in mind that while the flash caches of the pro and app
@@ -110,6 +110,10 @@ void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu()
         assert(other_cpuid == 1);
         spi_flash_disable_cache(other_cpuid, &s_flash_op_cache_state[other_cpuid]);
     } else {
+        // Temporarily raise current task priority to prevent a deadlock while
+        // waiting for IPC task to start on the other CPU
+        int old_prio = uxTaskPriorityGet(NULL);
+        vTaskPrioritySet(NULL, configMAX_PRIORITIES - 1);
         // Signal to the spi_flash_op_block_task on the other CPU that we need it to
         // disable cache there and block other tasks from executing.
         s_flash_op_can_start = false;
@@ -121,6 +125,8 @@ void IRAM_ATTR spi_flash_disable_interrupts_caches_and_other_cpu()
         }
         // Disable scheduler on the current CPU
         vTaskSuspendAll();
+        // Can now set the priority back to the normal one
+        vTaskPrioritySet(NULL, old_prio);
         // This is guaranteed to run on CPU <cpuid> because the other CPU is now
         // occupied by highest priority task
         assert(xPortGetCoreID() == cpuid);
@@ -287,6 +293,9 @@ static void IRAM_ATTR spi_flash_restore_cache(uint32_t cpuid, uint32_t saved_sta
 
 IRAM_ATTR bool spi_flash_cache_enabled()
 {
-    return DPORT_REG_GET_BIT(DPORT_PRO_CACHE_CTRL_REG, DPORT_PRO_CACHE_ENABLE)
-        && DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE);
+    bool result = (DPORT_REG_GET_BIT(DPORT_PRO_CACHE_CTRL_REG, DPORT_PRO_CACHE_ENABLE) != 0);
+#if portNUM_PROCESSORS == 2
+    result = result && (DPORT_REG_GET_BIT(DPORT_APP_CACHE_CTRL_REG, DPORT_APP_CACHE_ENABLE) != 0);
+#endif
+    return result;
 }