Merge branch 'feature/esp-wrover-kit-v4_1' into 'master'

[esp-idf] / components / esp32 / task_wdt.c

diff --git a/components/esp32/task_wdt.c b/components/esp32/task_wdt.c
index dc46e1c9b8572d77d66eafee58e6ce6cd4ec8a60..fb10aac05e66f0dae4e3fe38d3e1db66721a8529 100644 (file)
--- a/components/esp32/task_wdt.c
+++ b/components/esp32/task_wdt.c
@@ -33,8 +33,9 @@
 #include "soc/timer_group_reg.h"
 #include "esp_log.h"
 #include "driver/timer.h"
-
+#include "driver/periph_ctrl.h"
 #include "esp_task_wdt.h"
+#include "esp_system_internal.h"
 
 //Assertion macro where, if 'cond' is false, will exit the critical section and return 'ret'
 #define ASSERT_EXIT_CRIT_RETURN(cond, ret)  ({                              \
@@ -155,6 +156,7 @@ static void task_wdt_isr(void *arg)
     if (twdt_config->panic){     //Trigger Panic if configured to do so
         ets_printf("Aborting.\n");
         portEXIT_CRITICAL(&twdt_spinlock);
+        esp_reset_reason_set_hint(ESP_RST_TASK_WDT);
         abort();
     }
 
@@ -183,6 +185,7 @@ esp_err_t esp_task_wdt_init(uint32_t timeout, bool panic)
         ESP_ERROR_CHECK(esp_intr_alloc(ETS_TG0_WDT_LEVEL_INTR_SOURCE, 0, task_wdt_isr, NULL, &twdt_config->intr_handle))
 
         //Configure hardware timer
+        periph_module_enable(PERIPH_TIMG0_MODULE);
         TIMERG0.wdt_wprotect=TIMG_WDT_WKEY_VALUE;               //Disable write protection
         TIMERG0.wdt_config0.sys_reset_length=7;                 //3.2uS
         TIMERG0.wdt_config0.cpu_reset_length=7;                 //3.2uS