int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
depends on SPIRAM_USE_MALLOC
default 32768
- range 0 131072
+ range 0 262144
help
Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
that the internal memory is entirely filled up. This causes allocations that are specifically done in
Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
be sure to keep this in mind when adjusting this value.
+ Note also that the DMA reserved pool may not be one single contiguous memory region, depending on the
+ configured size and the static memory usage of the app.
+
+
config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
bool "Allow external memory as an argument to xTaskCreateStatic"
default n
default 7 if BROWNOUT_DET_LVL_SEL_7
+#Reduce PHY TX power when brownout reset
+config REDUCE_PHY_TX_POWER
+ bool "Reduce PHY TX power when brownout reset"
+ depends on BROWNOUT_DET
+ default y
+ help
+ When brownout reset occurs, reduce PHY TX power to keep the code running
+
# Note about the use of "FRC1" name: currently FRC1 timer is not used for
# high resolution timekeeping anymore. Instead the esp_timer API, implemented
# using FRC2 timer, is used.
default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
help
Choose which clock is used as RTC clock source.
+
+ - "Internal 150kHz oscillator" option provides lowest deep sleep current
+ consumption, and does not require extra external components. However
+ frequency stability with respect to temperature is poor, so time may
+ drift in deep/light sleep modes.
+ - "External 32kHz crystal" provides better frequency stability, at the
+ expense of slightly higher (1uA) deep sleep current consumption.
+ - "External 32kHz oscillator" allows using 32kHz clock generated by an
+ external circuit. In this case, external clock signal must be connected
+ to 32K_XP pin. Amplitude should be <1.2V in case of sine wave signal,
+ and <1V in case of square wave signal. Common mode voltage should be
+ 0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
+ Additionally, 1nF capacitor must be connected between 32K_XN pin and
+ ground. 32K_XN pin can not be used as a GPIO in this case.
+ - "Internal 8.5MHz oscillator divided by 256" option results in higher
+ deep sleep current (by 5uA) but has better frequency stability than
+ the internal 150kHz oscillator. It does not require external components.
config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
bool "Internal 150kHz RC oscillator"
config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
bool "External 32kHz crystal"
+config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC
+ bool "External 32kHz oscillator at 32K_XP pin"
+config ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256
+ bool "Internal 8.5MHz oscillator, divided by 256 (~33kHz)"
endchoice
config ESP32_RTC_CLK_CAL_CYCLES
int "Number of cycles for RTC_SLOW_CLK calibration"
default 3000 if ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
default 1024 if ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
- range 0 125000
+ range 0 27000 if ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL || ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC || ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256
+ range 0 32766 if ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
help
When the startup code initializes RTC_SLOW_CLK, it can perform
calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
order to save memory but this comes at the price of sacrificing
distinguishable (meaningful) output string representations.
+config ESP32_RTCDATA_IN_FAST_MEM
+ bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
+ default n
+ depends on FREERTOS_UNICORE
+ help
+ This option allows to place .rtc_data and .rtc_rodata sections into
+ RTC fast memory segment to free the slow memory region for ULP programs.
+ This option depends on the CONFIG_FREERTOS_UNICORE option because RTC fast memory
+ can be accessed only by PRO_CPU core.
+
endmenu # ESP32-Specific
menu Wi-Fi
bool "Core 1"
endchoice
+config ESP32_WIFI_SOFTAP_BEACON_MAX_LEN
+ int "Max length of WiFi SoftAP Beacon"
+ range 752 1256
+ default 752
+ help
+ ESP-MESH utilizes beacon frames to detect and resolve root node conflicts (see documentation). However the default
+ length of a beacon frame can simultaneously hold only five root node identifier structures, meaning that a root node
+ conflict of up to five nodes can be detected at one time. In the occurence of more root nodes conflict involving more
+ than five root nodes, the conflict resolution process will detect five of the root nodes, resolve the conflict, and
+ re-detect more root nodes. This process will repeat until all root node conflicts are resolved. However this process
+ can generally take a very long time.
+
+ To counter this situation, the beacon frame length can be increased such that more root nodes can be detected simultaneously.
+ Each additional root node will require 36 bytes and should be added ontop of the default beacon frame length of
+ 752 bytes. For example, if you want to detect 10 root nodes simultaneously, you need to set the beacon frame length as
+ 932 (752+36*5).
+
+ Setting a longer beacon length also assists with debugging as the conflicting root nodes can be identified more quickly.
+
endmenu # Wi-Fi
menu PHY
projects / esp-idf / blobdiff