2 ## Copyright (c) 2015 The WebM project authors. All Rights Reserved.
4 ## Use of this source code is governed by a BSD-style license
5 ## that can be found in the LICENSE file in the root of the source
6 ## tree. An additional intellectual property rights grant can be found
7 ## in the file PATENTS. All contributing project authors may
8 ## be found in the AUTHORS file in the root of the source tree.
11 DSP_SRCS-yes += vpx_dsp.mk
12 DSP_SRCS-yes += vpx_dsp_common.h
14 DSP_SRCS-$(HAVE_MSA) += mips/macros_msa.h
17 DSP_SRCS-yes += prob.h
18 DSP_SRCS-yes += prob.c
20 ifeq ($(CONFIG_ENCODERS),yes)
21 DSP_SRCS-yes += bitwriter.h
22 DSP_SRCS-yes += bitwriter.c
23 DSP_SRCS-yes += bitwriter_buffer.c
24 DSP_SRCS-yes += bitwriter_buffer.h
25 DSP_SRCS-yes += psnr.c
26 DSP_SRCS-yes += psnr.h
27 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c
28 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h
29 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c
30 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c
33 ifeq ($(CONFIG_DECODERS),yes)
34 DSP_SRCS-yes += bitreader.h
35 DSP_SRCS-yes += bitreader.c
36 DSP_SRCS-yes += bitreader_buffer.c
37 DSP_SRCS-yes += bitreader_buffer.h
41 DSP_SRCS-yes += intrapred.c
43 DSP_SRCS-$(HAVE_SSE) += x86/intrapred_sse2.asm
44 DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm
45 DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm
46 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
48 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
49 DSP_SRCS-$(HAVE_SSE) += x86/highbd_intrapred_sse2.asm
50 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm
51 endif # CONFIG_VP9_HIGHBITDEPTH
53 ifneq ($(filter yes,$(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
54 DSP_SRCS-yes += add_noise.c
55 DSP_SRCS-yes += deblock.c
56 DSP_SRCS-yes += postproc.h
57 DSP_SRCS-$(HAVE_MSA) += mips/add_noise_msa.c
58 DSP_SRCS-$(HAVE_MSA) += mips/deblock_msa.c
59 DSP_SRCS-$(HAVE_SSE2) += x86/add_noise_sse2.asm
60 DSP_SRCS-$(HAVE_SSE2) += x86/deblock_sse2.asm
61 endif # CONFIG_POSTPROC
63 DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM)
64 DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c
65 DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c
66 DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred4_dspr2.c
67 DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred8_dspr2.c
68 DSP_SRCS-$(HAVE_DSPR2) += mips/intrapred16_dspr2.c
70 DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.h
71 DSP_SRCS-$(HAVE_DSPR2) += mips/common_dspr2.c
73 # interpolation filters
74 DSP_SRCS-yes += vpx_convolve.c
75 DSP_SRCS-yes += vpx_convolve.h
76 DSP_SRCS-yes += vpx_filter.h
78 DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h
79 DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c
80 DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_8t_sse2.asm
81 DSP_SRCS-$(HAVE_SSE2) += x86/vpx_subpixel_bilinear_sse2.asm
82 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
83 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm
84 DSP_SRCS-$(HAVE_AVX2) += x86/vpx_subpixel_8t_intrin_avx2.c
85 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c
86 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
87 DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_8t_sse2.asm
88 DSP_SRCS-$(HAVE_SSE2) += x86/vpx_high_subpixel_bilinear_sse2.asm
91 DSP_SRCS-$(HAVE_SSE2) += x86/vpx_convolve_copy_sse2.asm
93 ifeq ($(HAVE_NEON_ASM),yes)
94 DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM)
95 DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM)
96 DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM)
97 DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM)
98 DSP_SRCS-yes += arm/vpx_convolve_neon.c
100 ifeq ($(HAVE_NEON),yes)
101 DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c
102 DSP_SRCS-yes += arm/vpx_convolve8_avg_neon.c
103 DSP_SRCS-yes += arm/vpx_convolve8_neon.c
104 DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c
105 DSP_SRCS-yes += arm/vpx_convolve_neon.c
107 endif # HAVE_NEON_ASM
110 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c
111 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c
112 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c
113 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c
114 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c
115 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c
116 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c
117 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c
118 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h
121 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve_common_dspr2.h
122 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_dspr2.c
123 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_avg_horiz_dspr2.c
124 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_dspr2.c
125 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_horiz_dspr2.c
126 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve2_vert_dspr2.c
127 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_dspr2.c
128 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_avg_horiz_dspr2.c
129 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_dspr2.c
130 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_horiz_dspr2.c
131 DSP_SRCS-$(HAVE_DSPR2) += mips/convolve8_vert_dspr2.c
134 DSP_SRCS-yes += loopfilter.c
136 DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/loopfilter_sse2.c
137 DSP_SRCS-$(HAVE_AVX2) += x86/loopfilter_avx2.c
139 DSP_SRCS-$(HAVE_NEON) += arm/loopfilter_neon.c
140 ifeq ($(HAVE_NEON_ASM),yes)
141 DSP_SRCS-yes += arm/loopfilter_mb_neon$(ASM)
142 DSP_SRCS-yes += arm/loopfilter_16_neon$(ASM)
143 DSP_SRCS-yes += arm/loopfilter_8_neon$(ASM)
144 DSP_SRCS-yes += arm/loopfilter_4_neon$(ASM)
146 ifeq ($(HAVE_NEON),yes)
147 DSP_SRCS-yes += arm/loopfilter_16_neon.c
148 DSP_SRCS-yes += arm/loopfilter_8_neon.c
149 DSP_SRCS-yes += arm/loopfilter_4_neon.c
151 endif # HAVE_NEON_ASM
153 DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_msa.h
154 DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_16_msa.c
155 DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_8_msa.c
156 DSP_SRCS-$(HAVE_MSA) += mips/loopfilter_4_msa.c
157 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.h
158 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_filters_dspr2.c
159 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_macros_dspr2.h
160 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_masks_dspr2.h
161 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_dspr2.c
162 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_horiz_dspr2.c
163 DSP_SRCS-$(HAVE_DSPR2) += mips/loopfilter_mb_vert_dspr2.c
165 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
166 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_loopfilter_sse2.c
167 endif # CONFIG_VP9_HIGHBITDEPTH
169 DSP_SRCS-yes += txfm_common.h
170 DSP_SRCS-$(HAVE_SSE2) += x86/txfm_common_sse2.h
171 DSP_SRCS-$(HAVE_MSA) += mips/txfm_macros_msa.h
173 ifeq ($(CONFIG_VP9_ENCODER),yes)
174 DSP_SRCS-yes += fwd_txfm.c
175 DSP_SRCS-yes += fwd_txfm.h
176 DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.h
177 DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_sse2.c
178 DSP_SRCS-$(HAVE_SSE2) += x86/fwd_txfm_impl_sse2.h
179 DSP_SRCS-$(HAVE_SSE2) += x86/fwd_dct32x32_impl_sse2.h
180 ifeq ($(ARCH_X86_64),yes)
181 DSP_SRCS-$(HAVE_SSSE3) += x86/fwd_txfm_ssse3_x86_64.asm
183 DSP_SRCS-$(HAVE_AVX2) += x86/fwd_txfm_avx2.c
184 DSP_SRCS-$(HAVE_AVX2) += x86/fwd_dct32x32_impl_avx2.h
185 DSP_SRCS-$(HAVE_NEON) += arm/fwd_txfm_neon.c
186 DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.h
187 DSP_SRCS-$(HAVE_MSA) += mips/fwd_txfm_msa.c
188 DSP_SRCS-$(HAVE_MSA) += mips/fwd_dct32x32_msa.c
189 endif # CONFIG_VP9_ENCODER
192 ifeq ($(CONFIG_VP9),yes)
193 DSP_SRCS-yes += inv_txfm.h
194 DSP_SRCS-yes += inv_txfm.c
195 DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.h
196 DSP_SRCS-$(HAVE_SSE2) += x86/inv_txfm_sse2.c
197 DSP_SRCS-$(HAVE_SSE2) += x86/inv_wht_sse2.asm
198 ifeq ($(ARCH_X86_64),yes)
199 DSP_SRCS-$(HAVE_SSSE3) += x86/inv_txfm_ssse3_x86_64.asm
202 ifeq ($(HAVE_NEON_ASM),yes)
203 DSP_SRCS-yes += arm/save_reg_neon$(ASM)
204 DSP_SRCS-yes += arm/idct4x4_1_add_neon$(ASM)
205 DSP_SRCS-yes += arm/idct4x4_add_neon$(ASM)
206 DSP_SRCS-yes += arm/idct8x8_1_add_neon$(ASM)
207 DSP_SRCS-yes += arm/idct8x8_add_neon$(ASM)
208 DSP_SRCS-yes += arm/idct16x16_1_add_neon$(ASM)
209 DSP_SRCS-yes += arm/idct16x16_add_neon$(ASM)
210 DSP_SRCS-yes += arm/idct32x32_1_add_neon$(ASM)
211 DSP_SRCS-yes += arm/idct32x32_add_neon$(ASM)
213 ifeq ($(HAVE_NEON),yes)
214 DSP_SRCS-yes += arm/idct4x4_1_add_neon.c
215 DSP_SRCS-yes += arm/idct4x4_add_neon.c
216 DSP_SRCS-yes += arm/idct8x8_1_add_neon.c
217 DSP_SRCS-yes += arm/idct8x8_add_neon.c
218 DSP_SRCS-yes += arm/idct16x16_1_add_neon.c
219 DSP_SRCS-yes += arm/idct16x16_add_neon.c
220 DSP_SRCS-yes += arm/idct32x32_1_add_neon.c
221 DSP_SRCS-yes += arm/idct32x32_add_neon.c
223 endif # HAVE_NEON_ASM
224 DSP_SRCS-$(HAVE_NEON) += arm/idct16x16_neon.c
226 DSP_SRCS-$(HAVE_MSA) += mips/inv_txfm_msa.h
227 DSP_SRCS-$(HAVE_MSA) += mips/idct4x4_msa.c
228 DSP_SRCS-$(HAVE_MSA) += mips/idct8x8_msa.c
229 DSP_SRCS-$(HAVE_MSA) += mips/idct16x16_msa.c
230 DSP_SRCS-$(HAVE_MSA) += mips/idct32x32_msa.c
232 ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
233 DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h
234 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c
235 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c
236 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c
237 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c
238 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c
239 endif # CONFIG_VP9_HIGHBITDEPTH
243 ifeq ($(CONFIG_VP9_ENCODER),yes)
244 DSP_SRCS-yes += quantize.c
245 DSP_SRCS-yes += quantize.h
247 DSP_SRCS-$(HAVE_SSE2) += x86/quantize_sse2.c
248 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
249 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_quantize_intrin_sse2.c
251 ifeq ($(ARCH_X86_64),yes)
252 DSP_SRCS-$(HAVE_SSSE3) += x86/quantize_ssse3_x86_64.asm
253 DSP_SRCS-$(HAVE_AVX) += x86/quantize_avx_x86_64.asm
257 DSP_SRCS-yes += avg.c
258 DSP_SRCS-$(HAVE_SSE2) += x86/avg_intrin_sse2.c
259 DSP_SRCS-$(HAVE_NEON) += arm/avg_neon.c
260 DSP_SRCS-$(HAVE_MSA) += mips/avg_msa.c
261 DSP_SRCS-$(HAVE_NEON) += arm/hadamard_neon.c
262 ifeq ($(ARCH_X86_64),yes)
263 DSP_SRCS-$(HAVE_SSSE3) += x86/avg_ssse3_x86_64.asm
266 endif # CONFIG_VP9_ENCODER
268 ifeq ($(CONFIG_ENCODERS),yes)
269 DSP_SRCS-yes += sad.c
270 DSP_SRCS-yes += subtract.c
271 DSP_SRCS-yes += sum_squares.c
272 DSP_SRCS-$(HAVE_SSE2) += x86/sum_squares_sse2.c
274 DSP_SRCS-$(HAVE_MEDIA) += arm/sad_media$(ASM)
275 DSP_SRCS-$(HAVE_NEON) += arm/sad4d_neon.c
276 DSP_SRCS-$(HAVE_NEON) += arm/sad_neon.c
277 DSP_SRCS-$(HAVE_NEON) += arm/subtract_neon.c
279 DSP_SRCS-$(HAVE_MSA) += mips/sad_msa.c
280 DSP_SRCS-$(HAVE_MSA) += mips/subtract_msa.c
282 DSP_SRCS-$(HAVE_SSE3) += x86/sad_sse3.asm
283 DSP_SRCS-$(HAVE_SSSE3) += x86/sad_ssse3.asm
284 DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm
285 DSP_SRCS-$(HAVE_AVX2) += x86/sad4d_avx2.c
286 DSP_SRCS-$(HAVE_AVX2) += x86/sad_avx2.c
288 DSP_SRCS-$(HAVE_SSE) += x86/sad4d_sse2.asm
289 DSP_SRCS-$(HAVE_SSE) += x86/sad_sse2.asm
290 DSP_SRCS-$(HAVE_SSE2) += x86/sad4d_sse2.asm
291 DSP_SRCS-$(HAVE_SSE2) += x86/sad_sse2.asm
292 DSP_SRCS-$(HAVE_SSE2) += x86/subtract_sse2.asm
294 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
295 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm
296 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm
297 endif # CONFIG_VP9_HIGHBITDEPTH
299 endif # CONFIG_ENCODERS
301 ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
302 DSP_SRCS-yes += variance.c
303 DSP_SRCS-yes += variance.h
305 DSP_SRCS-$(HAVE_MEDIA) += arm/bilinear_filter_media$(ASM)
306 DSP_SRCS-$(HAVE_MEDIA) += arm/subpel_variance_media.c
307 DSP_SRCS-$(HAVE_MEDIA) += arm/variance_halfpixvar16x16_h_media$(ASM)
308 DSP_SRCS-$(HAVE_MEDIA) += arm/variance_halfpixvar16x16_hv_media$(ASM)
309 DSP_SRCS-$(HAVE_MEDIA) += arm/variance_halfpixvar16x16_v_media$(ASM)
310 DSP_SRCS-$(HAVE_MEDIA) += arm/variance_media$(ASM)
311 DSP_SRCS-$(HAVE_NEON) += arm/subpel_variance_neon.c
312 DSP_SRCS-$(HAVE_NEON) += arm/variance_neon.c
314 DSP_SRCS-$(HAVE_MSA) += mips/variance_msa.c
315 DSP_SRCS-$(HAVE_MSA) += mips/sub_pixel_variance_msa.c
317 DSP_SRCS-$(HAVE_SSE) += x86/variance_sse2.c
318 DSP_SRCS-$(HAVE_SSE2) += x86/variance_sse2.c # Contains SSE2 and SSSE3
319 DSP_SRCS-$(HAVE_SSE2) += x86/halfpix_variance_sse2.c
320 DSP_SRCS-$(HAVE_SSE2) += x86/halfpix_variance_impl_sse2.asm
321 DSP_SRCS-$(HAVE_AVX2) += x86/variance_avx2.c
322 DSP_SRCS-$(HAVE_AVX2) += x86/variance_impl_avx2.c
324 ifeq ($(ARCH_X86_64),yes)
325 DSP_SRCS-$(HAVE_SSE2) += x86/ssim_opt_x86_64.asm
328 DSP_SRCS-$(HAVE_SSE) += x86/subpel_variance_sse2.asm
329 DSP_SRCS-$(HAVE_SSE2) += x86/subpel_variance_sse2.asm # Contains SSE2 and SSSE3
331 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
332 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_sse2.c
333 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_variance_impl_sse2.asm
334 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_subpel_variance_impl_sse2.asm
335 endif # CONFIG_VP9_HIGHBITDEPTH
336 endif # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC
338 DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes)
340 DSP_SRCS-yes += vpx_dsp_rtcd.c
341 DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl
343 $(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl))