granicus.if.org Git - libvpx/blob - vpx_dsp/vpx_dsp.mk

   1 ##
   2 ## Copyright (c) 2015 The WebM project authors. All Rights Reserved.
   3 ##
   4 ##  Use of this source code is governed by a BSD-style license
   5 ##  that can be found in the LICENSE file in the root of the source
   6 ##  tree. An additional intellectual property rights grant can be found
   7 ##  in the file PATENTS.  All contributing project authors may
   8 ##  be found in the AUTHORS file in the root of the source tree.
   9 ##
  10
  11 DSP_SRCS-yes += vpx_dsp.mk
  12 DSP_SRCS-yes += vpx_dsp_common.h
  13
  14 DSP_SRCS-$(HAVE_MSA)    += mips/macros_msa.h
  15
  16 # bit reader
  17 DSP_SRCS-yes += prob.h
  18 DSP_SRCS-yes += prob.c
  19
  20 ifeq ($(CONFIG_ENCODERS),yes)
  21 DSP_SRCS-yes += bitwriter.h
  22 DSP_SRCS-yes += bitwriter.c
  23 DSP_SRCS-yes += bitwriter_buffer.c
  24 DSP_SRCS-yes += bitwriter_buffer.h
  25 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.c
  26 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += ssim.h
  27 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += psnrhvs.c
  28 DSP_SRCS-$(CONFIG_INTERNAL_STATS) += fastssim.c
  29 endif
  30
  31 ifeq ($(CONFIG_DECODERS),yes)
  32 DSP_SRCS-yes += bitreader.h
  33 DSP_SRCS-yes += bitreader.c
  34 DSP_SRCS-yes += bitreader_buffer.c
  35 DSP_SRCS-yes += bitreader_buffer.h
  36 endif
  37
  38 # intra predictions
  39 ifeq ($(CONFIG_VP9),yes)
  40 DSP_SRCS-yes += intrapred.c
  41
  42 ifeq ($(CONFIG_USE_X86INC),yes)
  43 DSP_SRCS-$(HAVE_SSE2) += x86/intrapred_sse2.asm
  44 DSP_SRCS-$(HAVE_SSSE3) += x86/intrapred_ssse3.asm
  45 endif  # CONFIG_USE_X86INC
  46
  47 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
  48 ifeq ($(CONFIG_USE_X86INC),yes)
  49 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_intrapred_sse2.asm
  50 endif  # CONFIG_USE_X86INC
  51 endif  # CONFIG_VP9_HIGHBITDEPTH
  52
  53 DSP_SRCS-$(HAVE_NEON_ASM) += arm/intrapred_neon_asm$(ASM)
  54 DSP_SRCS-$(HAVE_NEON) += arm/intrapred_neon.c
  55 DSP_SRCS-$(HAVE_MSA) += mips/intrapred_msa.c
  56 DSP_SRCS-$(HAVE_DSPR2)  += mips/intrapred4_dspr2.c
  57 DSP_SRCS-$(HAVE_DSPR2)  += mips/intrapred8_dspr2.c
  58 DSP_SRCS-$(HAVE_DSPR2)  += mips/intrapred16_dspr2.c
  59 endif  # CONFIG_VP9
  60
  61 DSP_SRCS-$(HAVE_DSPR2)  += mips/common_dspr2.h
  62 DSP_SRCS-$(HAVE_DSPR2)  += mips/common_dspr2.c
  63
  64 # interpolation filters
  65 DSP_SRCS-yes += vpx_convolve.c
  66 DSP_SRCS-yes += vpx_convolve.h
  67 DSP_SRCS-yes += vpx_filter.h
  68
  69 DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/convolve.h
  70 DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64) += x86/vpx_asm_stubs.c
  71 DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_subpixel_8t_sse2.asm
  72 DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_subpixel_bilinear_sse2.asm
  73 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_ssse3.asm
  74 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_bilinear_ssse3.asm
  75 DSP_SRCS-$(HAVE_AVX2)  += x86/vpx_subpixel_8t_intrin_avx2.c
  76 DSP_SRCS-$(HAVE_SSSE3) += x86/vpx_subpixel_8t_intrin_ssse3.c
  77 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
  78 DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_high_subpixel_8t_sse2.asm
  79 DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_high_subpixel_bilinear_sse2.asm
  80 endif
  81 ifeq ($(CONFIG_USE_X86INC),yes)
  82 DSP_SRCS-$(HAVE_SSE2)  += x86/vpx_convolve_copy_sse2.asm
  83 endif
  84
  85 ifeq ($(HAVE_NEON_ASM),yes)
  86 DSP_SRCS-yes += arm/vpx_convolve_copy_neon_asm$(ASM)
  87 DSP_SRCS-yes += arm/vpx_convolve8_avg_neon_asm$(ASM)
  88 DSP_SRCS-yes += arm/vpx_convolve8_neon_asm$(ASM)
  89 DSP_SRCS-yes += arm/vpx_convolve_avg_neon_asm$(ASM)
  90 DSP_SRCS-yes += arm/vpx_convolve_neon.c
  91 else
  92 ifeq ($(HAVE_NEON),yes)
  93 DSP_SRCS-yes += arm/vpx_convolve_copy_neon.c
  94 DSP_SRCS-yes += arm/vpx_convolve8_avg_neon.c
  95 DSP_SRCS-yes += arm/vpx_convolve8_neon.c
  96 DSP_SRCS-yes += arm/vpx_convolve_avg_neon.c
  97 DSP_SRCS-yes += arm/vpx_convolve_neon.c
  98 endif  # HAVE_NEON
  99 endif  # HAVE_NEON_ASM
 100
 101 # common (msa)
 102 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_horiz_msa.c
 103 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_msa.c
 104 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_avg_vert_msa.c
 105 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_horiz_msa.c
 106 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_msa.c
 107 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve8_vert_msa.c
 108 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_avg_msa.c
 109 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_copy_msa.c
 110 DSP_SRCS-$(HAVE_MSA) += mips/vpx_convolve_msa.h
 111
 112 # common (dspr2)
 113 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve_common_dspr2.h
 114 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_avg_dspr2.c
 115 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_avg_horiz_dspr2.c
 116 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_dspr2.c
 117 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_horiz_dspr2.c
 118 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve2_vert_dspr2.c
 119 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_avg_dspr2.c
 120 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_avg_horiz_dspr2.c
 121 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_dspr2.c
 122 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_horiz_dspr2.c
 123 DSP_SRCS-$(HAVE_DSPR2)  += mips/convolve8_vert_dspr2.c
 124
 125 # loop filters
 126 DSP_SRCS-yes += loopfilter.c
 127
 128 DSP_SRCS-$(ARCH_X86)$(ARCH_X86_64)   += x86/loopfilter_sse2.c
 129 DSP_SRCS-$(HAVE_AVX2)                += x86/loopfilter_avx2.c
 130 DSP_SRCS-$(HAVE_MMX)                 += x86/loopfilter_mmx.asm
 131
 132 DSP_SRCS-$(HAVE_NEON)   += arm/loopfilter_neon.c
 133 ifeq ($(HAVE_NEON_ASM),yes)
 134 DSP_SRCS-yes  += arm/loopfilter_mb_neon$(ASM)
 135 DSP_SRCS-yes  += arm/loopfilter_16_neon$(ASM)
 136 DSP_SRCS-yes  += arm/loopfilter_8_neon$(ASM)
 137 DSP_SRCS-yes  += arm/loopfilter_4_neon$(ASM)
 138 else
 139 ifeq ($(HAVE_NEON),yes)
 140 DSP_SRCS-yes   += arm/loopfilter_16_neon.c
 141 DSP_SRCS-yes   += arm/loopfilter_8_neon.c
 142 DSP_SRCS-yes   += arm/loopfilter_4_neon.c
 143 endif  # HAVE_NEON
 144 endif  # HAVE_NEON_ASM
 145
 146 DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_msa.h
 147 DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_16_msa.c
 148 DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_8_msa.c
 149 DSP_SRCS-$(HAVE_MSA)    += mips/loopfilter_4_msa.c
 150
 151 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
 152 DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_loopfilter_sse2.c
 153 endif  # CONFIG_VP9_HIGHBITDEPTH
 154
 155 DSP_SRCS-yes            += txfm_common.h
 156 DSP_SRCS-$(HAVE_SSE2)   += x86/txfm_common_sse2.h
 157 DSP_SRCS-$(HAVE_MSA)    += mips/txfm_macros_msa.h
 158 # forward transform
 159 ifeq ($(CONFIG_VP9_ENCODER),yes)
 160 DSP_SRCS-yes            += fwd_txfm.c
 161 DSP_SRCS-yes            += fwd_txfm.h
 162 DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_txfm_sse2.h
 163 DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_txfm_sse2.c
 164 DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_txfm_impl_sse2.h
 165 DSP_SRCS-$(HAVE_SSE2)   += x86/fwd_dct32x32_impl_sse2.h
 166 ifeq ($(ARCH_X86_64),yes)
 167 ifeq ($(CONFIG_USE_X86INC),yes)
 168 DSP_SRCS-$(HAVE_SSSE3)  += x86/fwd_txfm_ssse3_x86_64.asm
 169 endif
 170 endif
 171 DSP_SRCS-$(HAVE_AVX2)   += x86/fwd_txfm_avx2.c
 172 DSP_SRCS-$(HAVE_AVX2)   += x86/fwd_dct32x32_impl_avx2.h
 173 DSP_SRCS-$(HAVE_NEON)   += arm/fwd_txfm_neon.c
 174 DSP_SRCS-$(HAVE_MSA)    += mips/fwd_txfm_msa.h
 175 DSP_SRCS-$(HAVE_MSA)    += mips/fwd_txfm_msa.c
 176 DSP_SRCS-$(HAVE_MSA)    += mips/fwd_dct32x32_msa.c
 177 endif  # CONFIG_VP9_ENCODER
 178
 179 # inverse transform
 180 ifeq ($(CONFIG_VP9),yes)
 181 DSP_SRCS-yes            += inv_txfm.h
 182 DSP_SRCS-yes            += inv_txfm.c
 183 DSP_SRCS-$(HAVE_SSE2)   += x86/inv_txfm_sse2.h
 184 DSP_SRCS-$(HAVE_SSE2)   += x86/inv_txfm_sse2.c
 185 ifeq ($(CONFIG_USE_X86INC),yes)
 186 DSP_SRCS-$(HAVE_SSE2)   += x86/inv_txfm_sse2.asm
 187 ifeq ($(ARCH_X86_64),yes)
 188 DSP_SRCS-$(HAVE_SSSE3)  += x86/inv_txfm_ssse3_x86_64.asm
 189 endif  # ARCH_X86_64
 190 endif  # CONFIG_USE_X86INC
 191
 192 ifeq ($(HAVE_NEON_ASM),yes)
 193 DSP_SRCS-yes  += arm/save_reg_neon$(ASM)
 194 DSP_SRCS-yes  += arm/idct4x4_1_add_neon$(ASM)
 195 DSP_SRCS-yes  += arm/idct4x4_add_neon$(ASM)
 196 DSP_SRCS-yes  += arm/idct8x8_1_add_neon$(ASM)
 197 DSP_SRCS-yes  += arm/idct8x8_add_neon$(ASM)
 198 DSP_SRCS-yes  += arm/idct16x16_1_add_neon$(ASM)
 199 DSP_SRCS-yes  += arm/idct16x16_add_neon$(ASM)
 200 DSP_SRCS-yes  += arm/idct32x32_1_add_neon$(ASM)
 201 DSP_SRCS-yes  += arm/idct32x32_add_neon$(ASM)
 202 else
 203 ifeq ($(HAVE_NEON),yes)
 204 DSP_SRCS-yes  += arm/idct4x4_1_add_neon.c
 205 DSP_SRCS-yes  += arm/idct4x4_add_neon.c
 206 DSP_SRCS-yes  += arm/idct8x8_1_add_neon.c
 207 DSP_SRCS-yes  += arm/idct8x8_add_neon.c
 208 DSP_SRCS-yes  += arm/idct16x16_1_add_neon.c
 209 DSP_SRCS-yes  += arm/idct16x16_add_neon.c
 210 DSP_SRCS-yes  += arm/idct32x32_1_add_neon.c
 211 DSP_SRCS-yes  += arm/idct32x32_add_neon.c
 212 endif  # HAVE_NEON
 213 endif  # HAVE_NEON_ASM
 214 DSP_SRCS-$(HAVE_NEON)  += arm/idct16x16_neon.c
 215
 216 DSP_SRCS-$(HAVE_MSA)   += mips/inv_txfm_msa.h
 217 DSP_SRCS-$(HAVE_MSA)   += mips/idct4x4_msa.c
 218 DSP_SRCS-$(HAVE_MSA)   += mips/idct8x8_msa.c
 219 DSP_SRCS-$(HAVE_MSA)   += mips/idct16x16_msa.c
 220 DSP_SRCS-$(HAVE_MSA)   += mips/idct32x32_msa.c
 221
 222 ifneq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
 223 DSP_SRCS-$(HAVE_DSPR2) += mips/inv_txfm_dspr2.h
 224 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans4_dspr2.c
 225 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans8_dspr2.c
 226 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans16_dspr2.c
 227 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_dspr2.c
 228 DSP_SRCS-$(HAVE_DSPR2) += mips/itrans32_cols_dspr2.c
 229 endif  # CONFIG_VP9_HIGHBITDEPTH
 230 endif  # CONFIG_VP9
 231
 232 # quantization
 233 ifeq ($(CONFIG_VP9_ENCODER),yes)
 234 DSP_SRCS-yes            += quantize.c
 235 DSP_SRCS-yes            += quantize.h
 236
 237 DSP_SRCS-$(HAVE_SSE2)   += x86/quantize_sse2.c
 238 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
 239 DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_quantize_intrin_sse2.c
 240 endif
 241 ifeq ($(ARCH_X86_64),yes)
 242 ifeq ($(CONFIG_USE_X86INC),yes)
 243 DSP_SRCS-$(HAVE_SSSE3) += x86/quantize_ssse3_x86_64.asm
 244 endif
 245 endif
 246 endif  # CONFIG_VP9_ENCODER
 247
 248 ifeq ($(CONFIG_ENCODERS),yes)
 249 DSP_SRCS-yes            += sad.c
 250 DSP_SRCS-yes            += subtract.c
 251
 252 DSP_SRCS-$(HAVE_MEDIA)  += arm/sad_media$(ASM)
 253 DSP_SRCS-$(HAVE_NEON)   += arm/sad4d_neon.c
 254 DSP_SRCS-$(HAVE_NEON)   += arm/sad_neon.c
 255 DSP_SRCS-$(HAVE_NEON)   += arm/subtract_neon.c
 256
 257 DSP_SRCS-$(HAVE_MSA)    += mips/sad_msa.c
 258 DSP_SRCS-$(HAVE_MSA)    += mips/subtract_msa.c
 259
 260 DSP_SRCS-$(HAVE_MMX)    += x86/sad_mmx.asm
 261 DSP_SRCS-$(HAVE_SSE3)   += x86/sad_sse3.asm
 262 DSP_SRCS-$(HAVE_SSSE3)  += x86/sad_ssse3.asm
 263 DSP_SRCS-$(HAVE_SSE4_1) += x86/sad_sse4.asm
 264 DSP_SRCS-$(HAVE_AVX2)   += x86/sad4d_avx2.c
 265 DSP_SRCS-$(HAVE_AVX2)   += x86/sad_avx2.c
 266
 267 ifeq ($(CONFIG_USE_X86INC),yes)
 268 DSP_SRCS-$(HAVE_SSE2)   += x86/sad4d_sse2.asm
 269 DSP_SRCS-$(HAVE_SSE2)   += x86/sad_sse2.asm
 270 DSP_SRCS-$(HAVE_SSE2)   += x86/subtract_sse2.asm
 271
 272 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
 273 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad4d_sse2.asm
 274 DSP_SRCS-$(HAVE_SSE2) += x86/highbd_sad_sse2.asm
 275 endif  # CONFIG_VP9_HIGHBITDEPTH
 276 endif  # CONFIG_USE_X86INC
 277
 278 endif  # CONFIG_ENCODERS
 279
 280 ifneq ($(filter yes,$(CONFIG_ENCODERS) $(CONFIG_POSTPROC) $(CONFIG_VP9_POSTPROC)),)
 281 DSP_SRCS-yes            += variance.c
 282 DSP_SRCS-yes            += variance.h
 283
 284 DSP_SRCS-$(HAVE_MEDIA)  += arm/bilinear_filter_media$(ASM)
 285 DSP_SRCS-$(HAVE_MEDIA)  += arm/subpel_variance_media.c
 286 DSP_SRCS-$(HAVE_MEDIA)  += arm/variance_halfpixvar16x16_h_media$(ASM)
 287 DSP_SRCS-$(HAVE_MEDIA)  += arm/variance_halfpixvar16x16_hv_media$(ASM)
 288 DSP_SRCS-$(HAVE_MEDIA)  += arm/variance_halfpixvar16x16_v_media$(ASM)
 289 DSP_SRCS-$(HAVE_MEDIA)  += arm/variance_media$(ASM)
 290 DSP_SRCS-$(HAVE_NEON)   += arm/subpel_variance_neon.c
 291 DSP_SRCS-$(HAVE_NEON)   += arm/variance_neon.c
 292
 293 DSP_SRCS-$(HAVE_MSA)    += mips/variance_msa.c
 294 DSP_SRCS-$(HAVE_MSA)    += mips/sub_pixel_variance_msa.c
 295
 296 DSP_SRCS-$(HAVE_MMX)    += x86/variance_mmx.c
 297 DSP_SRCS-$(HAVE_MMX)    += x86/variance_impl_mmx.asm
 298 DSP_SRCS-$(HAVE_SSE2)   += x86/variance_sse2.c  # Contains SSE2 and SSSE3
 299 DSP_SRCS-$(HAVE_AVX2)   += x86/variance_avx2.c
 300 DSP_SRCS-$(HAVE_AVX2)   += x86/variance_impl_avx2.c
 301
 302 ifeq ($(ARCH_X86_64),yes)
 303 DSP_SRCS-$(HAVE_SSE2)   += x86/ssim_opt_x86_64.asm
 304 endif  # ARCH_X86_64
 305
 306 ifeq ($(CONFIG_USE_X86INC),yes)
 307 DSP_SRCS-$(HAVE_SSE2)   += x86/subpel_variance_sse2.asm  # Contains SSE2 and SSSE3
 308 endif  # CONFIG_USE_X86INC
 309
 310 ifeq ($(CONFIG_VP9_HIGHBITDEPTH),yes)
 311 DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_variance_sse2.c
 312 DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_variance_impl_sse2.asm
 313 ifeq ($(CONFIG_USE_X86INC),yes)
 314 DSP_SRCS-$(HAVE_SSE2)   += x86/highbd_subpel_variance_impl_sse2.asm
 315 endif  # CONFIG_USE_X86INC
 316 endif  # CONFIG_VP9_HIGHBITDEPTH
 317 endif  # CONFIG_ENCODERS || CONFIG_POSTPROC || CONFIG_VP9_POSTPROC
 318
 319 DSP_SRCS-no += $(DSP_SRCS_REMOVE-yes)
 320
 321 DSP_SRCS-yes += vpx_dsp_rtcd.c
 322 DSP_SRCS-yes += vpx_dsp_rtcd_defs.pl
 323
 324 $(eval $(call rtcd_h_template,vpx_dsp_rtcd,vpx_dsp/vpx_dsp_rtcd_defs.pl))