1 /*-------------------------------------------------------------------------
4 * Atomic operations support when using HPs acc on HPUX
6 * Portions Copyright (c) 1996-2017, PostgreSQL Global Development Group
7 * Portions Copyright (c) 1994, Regents of the University of California
12 * * inline assembly for Itanium-based HP-UX:
13 * http://h21007.www2.hp.com/portal/download/files/unprot/Itanium/inline_assem_ERS.pdf
14 * * Implementing Spinlocks on the Intel (R) Itanium (R) Architecture and PA-RISC
15 * http://h21007.www2.hp.com/portal/download/files/unprot/itanium/spinlocks.pdf
17 * Itanium only supports a small set of numbers (6, -8, -4, -1, 1, 4, 8, 16)
18 * for atomic add/sub, so we just implement everything but compare_exchange
19 * via the compare_exchange fallbacks in atomics/generic.h.
21 * src/include/port/atomics/generic-acc.h
23 * -------------------------------------------------------------------------
26 #include <machine/sys/inline.h>
28 #define pg_compiler_barrier_impl() _Asm_sched_fence()
30 #if defined(HAVE_ATOMICS)
32 /* IA64 always has 32/64 bit atomics */
34 #define PG_HAVE_ATOMIC_U32_SUPPORT
35 typedef struct pg_atomic_uint32
37 volatile uint32 value;
40 #define PG_HAVE_ATOMIC_U64_SUPPORT
41 typedef struct pg_atomic_uint64
44 * Alignment is guaranteed to be 64bit. Search for "Well-behaved
45 * application restrictions" => "Data alignment and data sharing" on HP's
46 * website. Unfortunately the URL doesn't seem to stable enough to
49 volatile uint64 value;
53 #define MINOR_FENCE (_Asm_fence) (_UP_CALL_FENCE | _UP_SYS_FENCE | \
54 _DOWN_CALL_FENCE | _DOWN_SYS_FENCE )
56 #define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U32
58 pg_atomic_compare_exchange_u32_impl(volatile pg_atomic_uint32 *ptr,
59 uint32 *expected, uint32 newval)
64 _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
66 * We want a barrier, not just release/acquire semantics.
71 * DOWN_MEM_FENCE | _UP_MEM_FENCE prevents reordering by the compiler
73 current = _Asm_cmpxchg(_SZ_W, /* word */
77 _DOWN_MEM_FENCE | _UP_MEM_FENCE);
78 ret = current == *expected;
84 #define PG_HAVE_ATOMIC_COMPARE_EXCHANGE_U64
86 pg_atomic_compare_exchange_u64_impl(volatile pg_atomic_uint64 *ptr,
87 uint64 *expected, uint64 newval)
92 _Asm_mov_to_ar(_AREG_CCV, *expected, MINOR_FENCE);
94 current = _Asm_cmpxchg(_SZ_D, /* doubleword */
98 _DOWN_MEM_FENCE | _UP_MEM_FENCE);
99 ret = current == *expected;
106 #endif /* defined(HAVE_ATOMICS) */