2 * Copyright (c) 2013 Ben Noordhuis <info@bnoordhuis.nl>
3 * Copyright (c) 2013-2015 Dmitry V. Levin <ldv@altlinux.org>
4 * Copyright (c) 2016 Eugene Syromyatnikov <evgsyr@gmail.com>
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. The name of the author may not be used to endorse or promote products
16 * derived from this software without specific prior written permission.
18 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
19 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
20 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
21 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
22 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
23 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
24 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
25 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
26 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
27 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 #include "perf_event_struct.h"
34 #include "xlat/hw_breakpoint_len.h"
35 #include "xlat/hw_breakpoint_type.h"
36 #include "xlat/perf_attr_size.h"
37 #include "xlat/perf_branch_sample_type.h"
38 #include "xlat/perf_event_open_flags.h"
39 #include "xlat/perf_event_read_format.h"
40 #include "xlat/perf_event_sample_format.h"
41 #include "xlat/perf_hw_cache_id.h"
42 #include "xlat/perf_hw_cache_op_id.h"
43 #include "xlat/perf_hw_cache_op_result_id.h"
44 #include "xlat/perf_hw_id.h"
45 #include "xlat/perf_sw_ids.h"
46 #include "xlat/perf_type_id.h"
49 struct perf_event_attr *attr;
54 free_pea_desc(void *pea_desc_ptr)
56 struct pea_desc *desc = pea_desc_ptr;
63 fetch_perf_event_attr(struct tcb *const tcp, const kernel_ulong_t addr)
65 struct pea_desc *desc;
66 struct perf_event_attr *attr;
69 if (umove(tcp, addr + offsetof(struct perf_event_attr, size), &size)) {
74 if (size > sizeof(*attr))
78 size = PERF_ATTR_SIZE_VER0;
81 * Kernel (rightfully) deems invalid attribute structures with size less
82 * than first published format size, and we do the same.
84 if (size < PERF_ATTR_SIZE_VER0) {
90 size = offsetofend(struct perf_event_attr, config);
92 /* Size should be multiple of 8, but kernel doesn't check for it */
95 attr = xcalloc(1, sizeof(*attr));
97 if (umoven_or_printaddr(tcp, addr, size, attr)) {
103 desc = xmalloc(sizeof(*desc));
108 set_tcb_priv_data(tcp, desc, free_pea_desc);
113 #define PRINT_XLAT(prefix, xlat, x, dflt) \
116 printxval_search(xlat, x, dflt); \
120 print_perf_event_attr(struct tcb *const tcp, const kernel_ulong_t addr)
122 static const char *precise_ip_desc[] = {
125 "requested to have 0 skid",
129 struct pea_desc *desc;
130 struct perf_event_attr *attr;
133 int use_new_size = 0;
136 * Amusingly, kernel accepts structures with only part of the field
137 * present, so we making check like this (instead of checking
138 * offsetofend against size) in order to print fields as kernel sees
139 * them. This also should work great on big endian architectures.
141 #define _PERF_CHECK_FIELD(_field) \
143 if (offsetof(struct perf_event_attr, _field) >= size) \
144 goto print_perf_event_attr_out; \
147 desc = get_tcb_priv_data(tcp);
152 /* The only error which expected to change size field currently */
153 if (tcp->u_error == E2BIG) {
154 if (umove(tcp, addr + offsetof(struct perf_event_attr, size),
161 PRINT_XLAT("{type=", perf_type_id, attr->type, "PERF_TYPE_???");
163 printxval(perf_attr_size, attr->size, "PERF_ATTR_SIZE_???");
168 if (use_new_size > 0)
169 printxval(perf_attr_size, new_size,
170 "PERF_ATTR_SIZE_???");
175 switch (attr->type) {
176 case PERF_TYPE_HARDWARE:
177 PRINT_XLAT(", config=", perf_hw_id, attr->config,
178 "PERF_COUNT_HW_???");
180 case PERF_TYPE_SOFTWARE:
181 PRINT_XLAT(", config=", perf_sw_ids, attr->config,
182 "PERF_COUNT_SW_???");
184 case PERF_TYPE_TRACEPOINT:
186 * "The value to use in config can be obtained from under
187 * debugfs tracing/events/../../id if ftrace is enabled in the
190 tprintf(", config=%" PRIu64, attr->config);
192 case PERF_TYPE_HW_CACHE:
194 * (perf_hw_cache_id) | (perf_hw_cache_op_id << 8) |
195 * (perf_hw_cache_op_result_id << 16)
197 PRINT_XLAT(", config=", perf_hw_cache_id, attr->config & 0xFF,
198 "PERF_COUNT_HW_CACHE_???");
199 PRINT_XLAT("|", perf_hw_cache_op_id, (attr->config >> 8) & 0xFF,
200 "PERF_COUNT_HW_CACHE_OP_???");
202 * Current code (see set_ext_hw_attr in arch/x86/events/core.c,
203 * tile_map_cache_event in arch/tile/kernel/perf_event.c,
204 * arc_pmu_cache_event in arch/arc/kernel/perf_event.c,
205 * hw_perf_cache_event in arch/blackfin/kernel/perf_event.c,
206 * _hw_perf_cache_event in arch/metag/kernel/perf/perf_event.c,
207 * mipspmu_map_cache_event in arch/mips/kernel/perf_event_mipsxx.c,
208 * hw_perf_cache_event in arch/powerpc/perf/core-book3s.c,
209 * hw_perf_cache_event in arch/powerpc/perf/core-fsl-emb.c,
210 * hw_perf_cache_event in arch/sh/kernel/perf_event.c,
211 * sparc_map_cache_event in arch/sparc/kernel/perf_event.c,
212 * xtensa_pmu_cache_event in arch/xtensa/kernel/perf_event.c,
213 * armpmu_map_cache_event in drivers/perf/arm_pmu.c) assumes
214 * that cache result is 8 bits in size.
216 PRINT_XLAT("<<8|", perf_hw_cache_op_result_id,
217 (attr->config >> 16) & 0xFF,
218 "PERF_COUNT_HW_CACHE_RESULT_???");
220 if (attr->config >> 24) {
221 tprintf("|%#" PRIx64 "<<24", attr->config >> 24);
222 tprints_comment("PERF_COUNT_HW_CACHE_???");
227 * "If type is PERF_TYPE_RAW, then a custom "raw" config
228 * value is needed. Most CPUs support events that are not
229 * covered by the "generalized" events. These are
230 * implementation defined; see your CPU manual (for example the
231 * Intel Volume 3B documentation or the AMD BIOS and Kernel
232 * Developer Guide). The libpfm4 library can be used to
233 * translate from the name in the architectural manuals
234 * to the raw hex value perf_event_open() expects in this
237 case PERF_TYPE_BREAKPOINT:
239 * "If type is PERF_TYPE_BREAKPOINT, then leave config set
240 * to zero. Its parameters are set in other places."
243 tprintf(", config=%#" PRIx64, attr->config);
248 goto print_perf_event_attr_out;
251 tprintf(", sample_freq=%" PRIu64, attr->sample_freq);
253 tprintf(", sample_period=%" PRIu64, attr->sample_period);
255 tprints(", sample_type=");
256 printflags64(perf_event_sample_format, attr->sample_type,
259 tprints(", read_format=");
260 printflags64(perf_event_read_format, attr->read_format,
263 tprintf(", disabled=%u"
267 ", exclusive_user=%u"
268 ", exclude_kernel=%u"
275 ", enable_on_exec=%u"
284 attr->exclude_kernel,
291 attr->enable_on_exec,
295 tprints_comment(precise_ip_desc[attr->precise_ip]);
296 tprintf(", mmap_data=%u"
300 ", exclude_callchain_kernel=%u"
301 ", exclude_callchain_user=%u"
305 ", context_switch=%u"
306 ", write_backward=%u",
311 attr->exclude_callchain_kernel,
312 attr->exclude_callchain_user,
316 attr->context_switch,
317 attr->write_backward);
320 * Print it only in case it is non-zero, since it may contain flags we
321 * are not aware about.
323 if (attr->__reserved_1) {
324 tprintf(", __reserved_1=%#" PRIx64,
325 (uint64_t) attr->__reserved_1);
326 tprints_comment("Bits 63..28");
330 tprintf(", wakeup_watermark=%u", attr->wakeup_watermark);
332 tprintf(", wakeup_events=%u", attr->wakeup_events);
334 if (attr->type == PERF_TYPE_BREAKPOINT)
335 /* Any combination of R/W with X is deemed invalid */
336 PRINT_XLAT(", bp_type=", hw_breakpoint_type, attr->bp_type,
338 (HW_BREAKPOINT_X | HW_BREAKPOINT_RW)) ?
339 "HW_BREAKPOINT_INVALID" :
340 "HW_BREAKPOINT_???");
342 if (attr->type == PERF_TYPE_BREAKPOINT)
343 tprintf(", bp_addr=%#" PRIx64, attr->bp_addr);
345 tprintf(", config1=%#" PRIx64, attr->config1);
348 * Fields after bp_addr/config1 are optional and may not present; check
349 * against size is needed.
352 _PERF_CHECK_FIELD(bp_len);
353 if (attr->type == PERF_TYPE_BREAKPOINT)
354 tprintf(", bp_len=%" PRIu64, attr->bp_len);
356 tprintf(", config2=%#" PRIx64, attr->config2);
358 _PERF_CHECK_FIELD(branch_sample_type);
359 if (attr->sample_type & PERF_SAMPLE_BRANCH_STACK) {
360 tprints(", branch_sample_type=");
361 printflags64(perf_branch_sample_type, attr->branch_sample_type,
362 "PERF_SAMPLE_BRANCH_???");
365 _PERF_CHECK_FIELD(sample_regs_user);
367 * "This bit mask defines the set of user CPU registers to dump on
368 * samples. The layout of the register mask is architecture-specific and
369 * described in the kernel header
370 * arch/ARCH/include/uapi/asm/perf_regs.h."
372 tprintf(", sample_regs_user=%#" PRIx64, attr->sample_regs_user);
374 _PERF_CHECK_FIELD(sample_stack_user);
376 * "size of the user stack to dump if PERF_SAMPLE_STACK_USER is
379 if (attr->sample_type & PERF_SAMPLE_STACK_USER)
380 tprintf(", sample_stack_user=%#" PRIx32,
381 attr->sample_stack_user);
383 if (attr->use_clockid) {
384 _PERF_CHECK_FIELD(clockid);
385 tprints(", clockid=");
386 printxval(clocknames, attr->clockid, "CLOCK_???");
389 _PERF_CHECK_FIELD(sample_regs_intr);
390 tprintf(", sample_regs_intr=%#" PRIx64, attr->sample_regs_intr);
392 _PERF_CHECK_FIELD(aux_watermark);
393 tprintf(", aux_watermark=%" PRIu32, attr->aux_watermark);
395 _PERF_CHECK_FIELD(sample_max_stack);
396 tprintf(", sample_max_stack=%" PRIu16, attr->sample_max_stack);
398 /* _PERF_CHECK_FIELD(__reserved_2);
399 tprintf(", __reserved2=%" PRIu16, attr->__reserved_2); */
401 print_perf_event_attr_out:
402 if ((attr->size && (attr->size > size)) ||
403 (!attr->size && (size < PERF_ATTR_SIZE_VER0)))
409 SYS_FUNC(perf_event_open)
412 * We try to copy out the whole structure on entering in order to check
413 * size value on exiting. We do not check the rest of the fields because
414 * they shouldn't be changed, but copy the whole structure instead
415 * of just size field because they could.
418 if (!fetch_perf_event_attr(tcp, tcp->u_arg[0]))
421 print_perf_event_attr(tcp, tcp->u_arg[0]);
424 tprintf(", %d, %d, %d, ",
427 (int) tcp->u_arg[3]);
428 printflags64(perf_event_open_flags, tcp->u_arg[4], "PERF_FLAG_???");
430 return RVAL_DECODED | RVAL_FD;