1 // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
7 // http://www.apache.org/licenses/LICENSE-2.0
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
18 #include "rom/ets_sys.h"
21 #include "soc/dport_reg.h"
22 #include "soc/io_mux_reg.h"
23 #include "soc/rtc_cntl_reg.h"
24 #include "soc/gpio_reg.h"
25 #include "soc/gpio_sig_map.h"
26 #include "soc/emac_reg_v2.h"
27 #include "soc/emac_ex_reg.h"
30 #include "driver/gpio.h"
31 #include "sdkconfig.h"
33 #include "emac_common.h"
35 static const char *TAG = "emac";
37 void emac_enable_flowctrl(void)
39 REG_SET_BIT(EMAC_GMACFLOWCONTROL_REG, EMAC_TRANSMIT_FLOW_CONTROL_ENABLE);
40 REG_SET_BIT(EMAC_GMACFLOWCONTROL_REG, EMAC_RECEIVE_FLOW_CONTROL_ENABLE);
41 REG_CLR_BIT(EMAC_GMACFLOWCONTROL_REG, EMAC_DISABLE_ZERO_QUANTA_PAUSE);
42 REG_SET_FIELD(EMAC_GMACFLOWCONTROL_REG, EMAC_PAUSE_TIME, 0x1648);
43 REG_SET_FIELD(EMAC_GMACFLOWCONTROL_REG, EMAC_PAUSE_LOW_THRESHOLD, 0x1);
46 void emac_disable_flowctrl(void)
48 REG_CLR_BIT(EMAC_GMACFLOWCONTROL_REG, EMAC_TRANSMIT_FLOW_CONTROL_ENABLE);
49 REG_CLR_BIT(EMAC_GMACFLOWCONTROL_REG, EMAC_RECEIVE_FLOW_CONTROL_ENABLE);
50 REG_CLR_BIT(EMAC_GMACFLOWCONTROL_REG, EMAC_DISABLE_ZERO_QUANTA_PAUSE);
51 REG_SET_FIELD(EMAC_GMACFLOWCONTROL_REG, EMAC_PAUSE_TIME, 0);
52 REG_SET_FIELD(EMAC_GMACFLOWCONTROL_REG, EMAC_PAUSE_LOW_THRESHOLD, 0);
55 void emac_enable_dma_tx(void)
57 REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_TRANSMISSION_COMMAND);
60 void emac_enable_dma_rx(void)
62 REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_RECEIVE);
65 void emac_disable_dma_tx(void)
67 REG_CLR_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_OPERATE_SECOND_FRAME);
70 void emac_disable_dma_rx(void)
72 REG_CLR_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_START_STOP_RECEIVE);
76 uint32_t emac_read_mac_version(void)
79 data = REG_READ(EMAC_GMACVERSION_REG);
85 REG_SET_BIT(EMAC_DMABUSMODE_REG, EMAC_SW_RST);
87 while (REG_GET_BIT(EMAC_DMABUSMODE_REG, EMAC_SW_RST) == 1) {
88 //nothing to do ,if stop here,maybe emac have not clk input.
89 ESP_LOGI(TAG, "emac resetting ....");
92 ESP_LOGI(TAG, "emac reset done");
95 void emac_enable_clk(bool enable)
98 DPORT_REG_SET_BIT(EMAC_CLK_EN_REG, EMAC_CLK_EN);
100 DPORT_REG_CLR_BIT(EMAC_CLK_EN_REG, EMAC_CLK_EN);
104 void emac_dma_init(void)
106 REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_FORWARD_UNDERSIZED_GOOD_FRAMES);
107 REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_OPERATE_SECOND_FRAME);
108 REG_SET_FIELD(EMAC_DMABUSMODE_REG, EMAC_PROG_BURST_LEN, 4);
109 REG_SET_BIT(EMAC_DMAOPERATION_MODE_REG, EMAC_DMAOPERATION_MODE_REG);
112 void emac_mac_enable_txrx(void)
114 REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_GMACRX);
115 REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_GMACTX);
118 void emac_mac_init(void)
120 REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_GMACDUPLEX);
121 REG_SET_BIT(EMAC_GMACCONFIG_REG, EMAC_GMACMIIGMII);
122 REG_CLR_BIT(EMAC_GMACCONFIG_REG, EMAC_GMACFESPEED);
123 REG_SET_BIT(EMAC_GMACFRAMEFILTER_REG, EMAC_PROMISCUOUS_MODE);