1 // Copyright 2015-2016 Espressif Systems (Shanghai) PTE LTD
3 // Licensed under the Apache License, Version 2.0 (the "License");
4 // you may not use this file except in compliance with the License.
5 // You may obtain a copy of the License at
7 // http://www.apache.org/licenses/LICENSE-2.0
9 // Unless required by applicable law or agreed to in writing, software
10 // distributed under the License is distributed on an "AS IS" BASIS,
11 // WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
12 // See the License for the specific language governing permissions and
13 // limitations under the License.
20 #include "rom/ets_sys.h"
23 #include "rom/cache.h"
26 #include "soc/dport_reg.h"
27 #include "soc/io_mux_reg.h"
28 #include "soc/rtc_cntl_reg.h"
30 #include "freertos/FreeRTOS.h"
31 #include "freertos/task.h"
32 #include "freertos/semphr.h"
33 #include "freertos/queue.h"
34 #include "freertos/portmacro.h"
36 #include "tcpip_adapter.h"
38 #include "heap_alloc_caps.h"
39 #include "sdkconfig.h"
40 #include "esp_system.h"
41 #include "esp_spi_flash.h"
42 #include "nvs_flash.h"
43 #include "esp_event.h"
44 #include "esp_spi_flash.h"
46 #include "esp_crosscore_int.h"
48 #include "esp_vfs_dev.h"
49 #include "esp_newlib.h"
50 #include "esp_brownout.h"
51 #include "esp_int_wdt.h"
52 #include "esp_task_wdt.h"
53 #include "esp_phy_init.h"
54 #include "esp_coexist.h"
57 void start_cpu0(void) __attribute__((weak, alias("start_cpu0_default")));
58 void start_cpu0_default(void) IRAM_ATTR;
59 #if !CONFIG_FREERTOS_UNICORE
60 static void IRAM_ATTR call_start_cpu1();
61 void start_cpu1(void) __attribute__((weak, alias("start_cpu1_default")));
62 void start_cpu1_default(void) IRAM_ATTR;
63 static bool app_cpu_started = false;
64 #endif //!CONFIG_FREERTOS_UNICORE
66 static void do_global_ctors(void);
67 static void do_phy_init();
68 static void main_task(void* args);
69 extern void app_main(void);
71 extern int _bss_start;
73 extern int _rtc_bss_start;
74 extern int _rtc_bss_end;
75 extern int _init_start;
76 extern void (*__init_array_start)(void);
77 extern void (*__init_array_end)(void);
78 extern volatile int port_xSchedulerRunning[2];
80 static const char* TAG = "cpu_start";
83 * We arrive here after the bootloader finished loading the program from flash. The hardware is mostly uninitialized,
84 * and the app CPU is in reset. We do have a stack, so we can do the initialization in C.
87 void IRAM_ATTR call_start_cpu0()
90 REG_CLR_BIT(RTC_CNTL_WDTCONFIG0_REG, RTC_CNTL_WDT_FLASHBOOT_MOD_EN);
91 REG_CLR_BIT(0x6001f048, BIT(14)); //DR_REG_BB_BASE+48
93 cpu_configure_region_protection();
95 //Move exception vectors to IRAM
101 ets_install_uart_printf();
103 memset(&_bss_start, 0, (&_bss_end - &_bss_start) * sizeof(_bss_start));
105 /* Unless waking from deep sleep (implying RTC memory is intact), clear RTC bss */
106 if (rtc_get_reset_reason(0) != DEEPSLEEP_RESET) {
107 memset(&_rtc_bss_start, 0, (&_rtc_bss_end - &_rtc_bss_start) * sizeof(_rtc_bss_start));
110 // Initialize heap allocator
111 heap_alloc_caps_init();
113 ESP_EARLY_LOGI(TAG, "Pro cpu up.");
115 #if !CONFIG_FREERTOS_UNICORE
116 ESP_EARLY_LOGI(TAG, "Starting app cpu, entry point is %p", call_start_cpu1);
117 //Flush and enable icache for APP CPU
119 Cache_Read_Enable(1);
121 //Enable clock gating and reset the app cpu.
122 SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
123 CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_C_REG, DPORT_APPCPU_RUNSTALL);
124 SET_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
125 CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_A_REG, DPORT_APPCPU_RESETTING);
126 ets_set_appcpu_boot_addr((uint32_t)call_start_cpu1);
128 while (!app_cpu_started) {
132 ESP_EARLY_LOGI(TAG, "Single core mode");
133 CLEAR_PERI_REG_MASK(DPORT_APPCPU_CTRL_B_REG, DPORT_APPCPU_CLKGATE_EN);
135 ESP_EARLY_LOGI(TAG, "Pro cpu start user code");
139 #if !CONFIG_FREERTOS_UNICORE
140 void IRAM_ATTR call_start_cpu1()
143 "wsr %0, vecbase\n" \
144 ::"r"(&_init_start));
146 cpu_configure_region_protection();
148 ESP_EARLY_LOGI(TAG, "App cpu up.");
152 #endif //!CONFIG_FREERTOS_UNICORE
154 void start_cpu0_default(void)
156 esp_setup_syscall_table();
157 //Enable trace memory and immediately start trace.
158 #if CONFIG_MEMMAP_TRACEMEM
159 #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
160 trax_enable(TRAX_ENA_PRO_APP);
162 trax_enable(TRAX_ENA_PRO);
164 trax_start_trace(TRAX_DOWNCOUNT_WORDS);
166 esp_set_cpu_freq(); // set CPU frequency configured in menuconfig
167 uart_div_modify(0, (APB_CLK_FREQ << 4) / 115200);
168 #if CONFIG_BROWNOUT_DET
177 esp_setup_time_syscalls();
178 esp_vfs_dev_uart_register();
179 esp_reent_init(_GLOBAL_REENT);
180 const char* default_uart_dev = "/dev/uart/0";
181 _GLOBAL_REENT->_stdin = fopen(default_uart_dev, "r");
182 _GLOBAL_REENT->_stdout = fopen(default_uart_dev, "w");
183 _GLOBAL_REENT->_stderr = fopen(default_uart_dev, "w");
185 #if !CONFIG_FREERTOS_UNICORE
186 esp_crosscore_int_init();
191 #if CONFIG_ESP32_PHY_AUTO_INIT
196 #if CONFIG_SW_COEXIST_ENABLE
197 if (coex_init() == ESP_OK) {
198 coexist_set_enable(true);
202 xTaskCreatePinnedToCore(&main_task, "main",
203 ESP_TASK_MAIN_STACK, NULL,
204 ESP_TASK_MAIN_PRIO, NULL, 0);
205 ESP_LOGI(TAG, "Starting scheduler on PRO CPU.");
206 vTaskStartScheduler();
209 #if !CONFIG_FREERTOS_UNICORE
210 void start_cpu1_default(void)
212 #if CONFIG_MEMMAP_TRACEMEM_TWOBANKS
213 trax_start_trace(TRAX_DOWNCOUNT_WORDS);
215 // Wait for FreeRTOS initialization to finish on PRO CPU
216 while (port_xSchedulerRunning[0] == 0) {
219 esp_crosscore_int_init();
220 ESP_LOGI(TAG, "Starting scheduler on APP CPU.");
221 xPortStartScheduler();
223 #endif //!CONFIG_FREERTOS_UNICORE
225 static void do_global_ctors(void)
228 for (p = &__init_array_end - 1; p >= &__init_array_start; --p) {
233 static void main_task(void* args)
239 static void do_phy_init()
241 esp_phy_calibration_mode_t calibration_mode = PHY_RF_CAL_PARTIAL;
242 if (rtc_get_reset_reason(0) == DEEPSLEEP_RESET) {
243 calibration_mode = PHY_RF_CAL_NONE;
245 const esp_phy_init_data_t* init_data = esp_phy_get_init_data();
246 if (init_data == NULL) {
247 ESP_LOGE(TAG, "failed to obtain PHY init data");
250 esp_phy_calibration_data_t* cal_data =
251 (esp_phy_calibration_data_t*) calloc(sizeof(esp_phy_calibration_data_t), 1);
252 if (cal_data == NULL) {
253 ESP_LOGE(TAG, "failed to allocate memory for RF calibration data");
256 esp_err_t err = esp_phy_load_cal_data_from_nvs(cal_data);
258 ESP_LOGW(TAG, "failed to load RF calibration data, falling back to full calibration");
259 calibration_mode = PHY_RF_CAL_FULL;
262 esp_phy_init(init_data, calibration_mode, cal_data);
264 if (calibration_mode != PHY_RF_CAL_NONE) {
265 err = esp_phy_store_cal_data_to_nvs(cal_data);
269 esp_phy_release_init_data(init_data);
270 free(cal_data); // PHY maintains a copy of calibration data, so we can free this