3 choice ESP32_DEFAULT_CPU_FREQ_MHZ
5 default ESP32_DEFAULT_CPU_FREQ_160
7 CPU frequency to be set on application startup.
9 config ESP32_DEFAULT_CPU_FREQ_80
11 config ESP32_DEFAULT_CPU_FREQ_160
13 config ESP32_DEFAULT_CPU_FREQ_240
17 config ESP32_DEFAULT_CPU_FREQ_MHZ
19 default 80 if ESP32_DEFAULT_CPU_FREQ_80
20 default 160 if ESP32_DEFAULT_CPU_FREQ_160
21 default 240 if ESP32_DEFAULT_CPU_FREQ_240
24 bool "Support for external, SPI-connected RAM"
27 This enables support for an external SPI RAM chip, connected in parallel with the
31 depends on SPIRAM_SUPPORT
33 config SPIRAM_BOOT_INIT
34 bool "Initialize SPI RAM when booting the ESP32"
37 If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
38 have specific requirements, you'll want to leave this enabled so memory allocated
39 during boot-up can also be placed in SPI RAM.
41 config SPIRAM_IGNORE_NOTFOUND
42 bool "Ignore PSRAM when not found"
44 depends on SPIRAM_BOOT_INIT
46 Normally, if psram initialization is enabled during compile time but not found at runtime, it
47 is seen as an error making the ESP32 panic. If this is enabled, the ESP32 will keep on
48 running but will not add the (non-existing) RAM to any allocator.
51 prompt "SPI RAM access method"
52 default SPIRAM_USE_MALLOC
54 The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
55 memory region in the ESP32 memory map, by integrating it in the ESP32s heap as 'special' memory
56 needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
57 return SPI RAM pointers.
59 config SPIRAM_USE_MEMMAP
60 bool "Integrate RAM into ESP32 memory map"
61 config SPIRAM_USE_CAPS_ALLOC
62 bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPIRAM)"
63 config SPIRAM_USE_MALLOC
64 bool "Make RAM allocatable using malloc() as well"
65 select SUPPORT_STATIC_ALLOCATION
69 prompt "Type of SPI RAM chip in use"
70 default SPIRAM_TYPE_ESPPSRAM32
72 config SPIRAM_TYPE_ESPPSRAM32
73 bool "ESP-PSRAM32 or IS25WP032"
78 default 4194304 if SPIRAM_TYPE_ESPPSRAM32
82 prompt "Set RAM clock speed"
83 default SPIRAM_CACHE_SPEED_40M
85 Select the speed for the SPI RAM chip.
86 If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
88 1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz
89 2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz
90 3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz
92 Note: If the third mode(80Mhz+80Mhz) is enabled, the VSPI port will be occupied by the system.
93 Application code should never touch VSPI hardware in this case. The option to select
94 80MHz will only be visible if the flash SPI speed is also 80MHz. (ESPTOOLPY_FLASHFREQ_80M is true)
96 config SPIRAM_SPEED_40M
97 bool "40MHz clock speed"
98 config SPIRAM_SPEED_80M
99 depends on ESPTOOLPY_FLASHFREQ_80M
100 bool "80MHz clock speed"
103 config SPIRAM_MEMTEST
104 bool "Run memory test on SPI RAM initialization"
106 depends on SPIRAM_BOOT_INIT
108 Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
109 slightly faster startop.
111 config SPIRAM_CACHE_WORKAROUND
112 bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
113 depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
116 Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
117 when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
118 fix in the compiler that makes sure the specific code that is vulnerable to this will not be emitted.
120 This will also not use any bits of newlib that are located in ROM, opting for a version that is compiled
121 with the workaround and located in flash instead.
124 config SPIRAM_MALLOC_ALWAYSINTERNAL
125 int "Maximum malloc() size, in bytes, to always put in internal memory"
126 depends on SPIRAM_USE_MALLOC
130 If malloc() is capable of also allocating SPI-connected ram, its allocation strategy will prefer to allocate chunks less
131 than this size in internal memory, while allocations larger than this will be done from external RAM.
132 If allocation from the preferred region fails, an attempt is made to allocate from the non-preferred
133 region instead, so malloc() will not suddenly fail when either internal or external memory is full.
135 config WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST
136 bool "Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, allocate internal memory"
137 depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
140 Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, try to allocate internal memory then.
142 config SPIRAM_MALLOC_RESERVE_INTERNAL
143 int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
144 depends on SPIRAM_USE_MALLOC
148 Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
149 that the internal memory is entirely filled up. This causes allocations that are specifically done in
150 internal memory, for example the stack for new tasks or memory to service DMA or have memory that's
151 also available when SPI cache is down, to fail. This option reserves a pool specifically for requests
152 like that; the memory in this pool is not given out when a normal malloc() is called.
154 Set this to 0 to disable this feature.
156 Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
157 be sure to keep this in mind when adjusting this value.
159 Note also that the DMA reserved pool may not be one single contiguous memory region, depending on the
160 configured size and the static memory usage of the app.
163 config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
164 bool "Allow external memory as an argument to xTaskCreateStatic"
166 depends on SPIRAM_USE_MALLOC
168 Because some bits of the ESP32 code environment cannot be recompiled with the cache workaround, normally
169 tasks cannot be safely run with their stack residing in external memory; for this reason xTaskCreate and
170 friends always allocate stack in internal memory and xTaskCreateStatic will check if the memory passed
171 to it is in internal memory. If you have a task that needs a large amount of stack and does not call on
172 ROM code in any way (no direct calls, but also no Bluetooth/WiFi), you can try to disable this and use
173 xTaskCreateStatic to create the tasks stack in external memory.
177 config MEMMAP_TRACEMEM
181 config MEMMAP_TRACEMEM_TWOBANKS
186 bool "Use TRAX tracing feature"
188 select MEMMAP_TRACEMEM
190 The ESP32 contains a feature which allows you to trace the execution path the processor
191 has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
192 of memory that can't be used for general purposes anymore. Disable this if you do not know
195 config ESP32_TRAX_TWOBANKS
196 bool "Reserve memory for tracing both pro as well as app cpu execution"
198 depends on ESP32_TRAX && !FREERTOS_UNICORE
199 select MEMMAP_TRACEMEM_TWOBANKS
201 The ESP32 contains a feature which allows you to trace the execution path the processor
202 has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
203 of memory that can't be used for general purposes anymore. Disable this if you do not know
206 # Memory to reverse for trace, used in linker script
207 config TRACEMEM_RESERVE_DRAM
209 default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
210 default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
213 choice ESP32_COREDUMP_TO_FLASH_OR_UART
214 prompt "Core dump destination"
215 default ESP32_ENABLE_COREDUMP_TO_NONE
217 Select place to store core dump: flash, uart or none (to disable core dumps generation).
219 If core dump is configured to be stored in flash and custom partition table is used add
220 corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
221 in the components/partition_table directory.
223 config ESP32_ENABLE_COREDUMP_TO_FLASH
225 select ESP32_ENABLE_COREDUMP
226 config ESP32_ENABLE_COREDUMP_TO_UART
228 select ESP32_ENABLE_COREDUMP
229 config ESP32_ENABLE_COREDUMP_TO_NONE
233 config ESP32_ENABLE_COREDUMP
237 Enables/disable core dump module.
239 config ESP32_CORE_DUMP_UART_DELAY
240 int "Core dump print to UART delay"
241 depends on ESP32_ENABLE_COREDUMP_TO_UART
244 Config delay (in ms) before printing core dump to UART.
245 Delay can be interrupted by pressing Enter key.
247 config ESP32_CORE_DUMP_LOG_LEVEL
248 int "Core dump module logging level"
249 depends on ESP32_ENABLE_COREDUMP
252 Config core dump module logging level (0-5).
254 choice NUMBER_OF_UNIVERSAL_MAC_ADDRESS
255 bool "Number of universally administered (by IEEE) MAC address"
256 default FOUR_UNIVERSAL_MAC_ADDRESS
258 Configure the number of universally administered (by IEEE) MAC addresses.
259 During initialisation, MAC addresses for each network interface are generated or derived from a
260 single base MAC address.
261 If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
262 Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
263 sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
264 If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
265 receive a universally administered MAC address. These are generated sequentially by adding 0
266 and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
267 receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
268 addresses, respectively.
269 When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
270 a custom universal MAC address range, the correct setting will depend on the allocation of MAC
271 addresses in this range (either 2 or 4 per device.)
273 config TWO_UNIVERSAL_MAC_ADDRESS
275 config FOUR_UNIVERSAL_MAC_ADDRESS
279 config NUMBER_OF_UNIVERSAL_MAC_ADDRESS
281 default 2 if TWO_UNIVERSAL_MAC_ADDRESS
282 default 4 if FOUR_UNIVERSAL_MAC_ADDRESS
284 config SYSTEM_EVENT_QUEUE_SIZE
285 int "System event queue size"
288 Config system event queue size in different application.
290 config SYSTEM_EVENT_TASK_STACK_SIZE
291 int "Event loop task stack size"
294 Config system event task stack size in different application.
296 config MAIN_TASK_STACK_SIZE
297 int "Main task stack size"
300 Configure the "main task" stack size. This is the stack of the task
301 which calls app_main(). If app_main() returns then this task is deleted
302 and its stack memory is freed.
304 config IPC_TASK_STACK_SIZE
305 int "Inter-Processor Call (IPC) task stack size"
307 range 512 65536 if !ESP32_APPTRACE_ENABLE
308 range 2048 65536 if ESP32_APPTRACE_ENABLE
310 Configure the IPC tasks stack size. One IPC task runs on each core
311 (in dual core mode), and allows for cross-core function calls.
313 See IPC documentation for more details.
315 The default stack size should be enough for most common use cases.
316 It can be shrunk if you are sure that you do not use any custom
319 config TIMER_TASK_STACK_SIZE
320 int "High-resolution timer task stack size"
324 Configure the stack size of esp_timer/ets_timer task. This task is used
325 to dispatch callbacks of timers created using ets_timer and esp_timer
326 APIs. If you are seing stack overflow errors in timer task, increase
329 Note that this is not the same as FreeRTOS timer task. To configure
330 FreeRTOS timer task size, see "FreeRTOS timer task stack size" option
333 choice NEWLIB_STDOUT_LINE_ENDING
334 prompt "Line ending for UART output"
335 default NEWLIB_STDOUT_LINE_ENDING_CRLF
337 This option allows configuring the desired line endings sent to UART
338 when a newline ('\n', LF) appears on stdout.
339 Three options are possible:
341 CRLF: whenever LF is encountered, prepend it with CR
343 LF: no modification is applied, stdout is sent as is
345 CR: each occurence of LF is replaced with CR
347 This option doesn't affect behavior of the UART driver (drivers/uart.h).
349 config NEWLIB_STDOUT_LINE_ENDING_CRLF
351 config NEWLIB_STDOUT_LINE_ENDING_LF
353 config NEWLIB_STDOUT_LINE_ENDING_CR
357 choice NEWLIB_STDIN_LINE_ENDING
358 prompt "Line ending for UART input"
359 default NEWLIB_STDIN_LINE_ENDING_CR
361 This option allows configuring which input sequence on UART produces
362 a newline ('\n', LF) on stdin.
363 Three options are possible:
365 CRLF: CRLF is converted to LF
367 LF: no modification is applied, input is sent to stdin as is
369 CR: each occurence of CR is replaced with LF
371 This option doesn't affect behavior of the UART driver (drivers/uart.h).
373 config NEWLIB_STDIN_LINE_ENDING_CRLF
375 config NEWLIB_STDIN_LINE_ENDING_LF
377 config NEWLIB_STDIN_LINE_ENDING_CR
381 config NEWLIB_NANO_FORMAT
382 bool "Enable 'nano' formatting options for printf/scanf family"
385 ESP32 ROM contains parts of newlib C library, including printf/scanf family
386 of functions. These functions have been compiled with so-called "nano"
387 formatting option. This option doesn't support 64-bit integer formats and C99
388 features, such as positional arguments.
390 For more details about "nano" formatting option, please see newlib readme file,
391 search for '--enable-newlib-nano-formatted-io':
392 https://sourceware.org/newlib/README
394 If this option is enabled, build system will use functions available in
395 ROM, reducing the application binary size. Functions available in ROM run
396 faster than functions which run from flash. Functions available in ROM can
397 also run when flash instruction cache is disabled.
399 If you need 64-bit integer formatting support or C99 features, keep this
403 prompt "UART for console output"
404 default CONSOLE_UART_DEFAULT
406 Select whether to use UART for console output (through stdout and stderr).
408 - Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
409 - If "Custom" is selected, UART0 or UART1 can be chosen,
410 and any pins can be selected.
411 - If "None" is selected, there will be no console output on any UART, except
412 for initial output from ROM bootloader. This output can be further suppressed by
413 bootstrapping GPIO13 pin to low logic level.
415 config CONSOLE_UART_DEFAULT
416 bool "Default: UART0, TX=GPIO1, RX=GPIO3"
417 config CONSOLE_UART_CUSTOM
419 config CONSOLE_UART_NONE
423 choice CONSOLE_UART_NUM
424 prompt "UART peripheral to use for console output (0-1)"
425 depends on CONSOLE_UART_CUSTOM
426 default CONSOLE_UART_CUSTOM_NUM_0
428 Due of a ROM bug, UART2 is not supported for console output
431 config CONSOLE_UART_CUSTOM_NUM_0
433 config CONSOLE_UART_CUSTOM_NUM_1
437 config CONSOLE_UART_NUM
439 default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
440 default 0 if CONSOLE_UART_CUSTOM_NUM_0
441 default 1 if CONSOLE_UART_CUSTOM_NUM_1
443 config CONSOLE_UART_TX_GPIO
444 int "UART TX on GPIO#"
445 depends on CONSOLE_UART_CUSTOM
449 config CONSOLE_UART_RX_GPIO
450 int "UART RX on GPIO#"
451 depends on CONSOLE_UART_CUSTOM
455 config CONSOLE_UART_BAUDRATE
456 int "UART console baud rate"
457 depends on !CONSOLE_UART_NONE
461 config ULP_COPROC_ENABLED
462 bool "Enable Ultra Low Power (ULP) Coprocessor"
465 Set to 'y' if you plan to load a firmware for the coprocessor.
467 If this option is enabled, further coprocessor configuration will appear in the Components menu.
469 config ULP_COPROC_RESERVE_MEM
471 prompt "RTC slow memory reserved for coprocessor" if ULP_COPROC_ENABLED
472 default 512 if ULP_COPROC_ENABLED
473 range 32 8192 if ULP_COPROC_ENABLED
474 default 0 if !ULP_COPROC_ENABLED
475 range 0 0 if !ULP_COPROC_ENABLED
477 Bytes of memory to reserve for ULP coprocessor firmware & data.
479 Data is reserved at the beginning of RTC slow memory.
482 prompt "Panic handler behaviour"
483 default ESP32_PANIC_PRINT_REBOOT
485 If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
486 invoked. Configure the panic handlers action here.
488 config ESP32_PANIC_PRINT_HALT
489 bool "Print registers and halt"
491 Outputs the relevant registers over the serial port and halt the
492 processor. Needs a manual reset to restart.
494 config ESP32_PANIC_PRINT_REBOOT
495 bool "Print registers and reboot"
497 Outputs the relevant registers over the serial port and immediately
500 config ESP32_PANIC_SILENT_REBOOT
503 Just resets the processor without outputting anything
505 config ESP32_PANIC_GDBSTUB
506 bool "Invoke GDBStub"
508 Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
512 config ESP32_DEBUG_OCDAWARE
513 bool "Make exception and panic handlers JTAG/OCD aware"
516 The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
517 instead of panicking, have the debugger stop on the offending instruction.
519 config ESP32_DEBUG_STUBS_ENABLE
520 bool "OpenOCD debug stubs"
521 default OPTIMIZATION_LEVEL_DEBUG
522 depends on !ESP32_TRAX
524 Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
528 bool "Interrupt watchdog"
531 This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
532 either because a task turned off interrupts and did not turn them on for a long time, or because an
533 interrupt handler did not return. It will try to invoke the panic handler first and failing that
536 config INT_WDT_TIMEOUT_MS
537 int "Interrupt watchdog timeout (ms)"
539 default 300 if !SPIRAM_SUPPORT
540 default 800 if SPIRAM_SUPPORT
543 The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
545 config INT_WDT_CHECK_CPU1
546 bool "Also watch CPU1 tick interrupt"
547 depends on INT_WDT && !FREERTOS_UNICORE
550 Also detect if interrupts on CPU 1 are disabled for too long.
553 bool "Initialize Task Watchdog Timer on startup"
556 The Task Watchdog Timer can be used to make sure individual tasks are still
557 running. Enabling this option will cause the Task Watchdog Timer to be
558 initialized automatically at startup. The Task Watchdog timer can be
559 initialized after startup as well (see Task Watchdog Timer API Reference)
561 config TASK_WDT_PANIC
562 bool "Invoke panic handler on Task Watchdog timeout"
566 If this option is enabled, the Task Watchdog Timer will be configured to
567 trigger the panic handler when it times out. This can also be configured
568 at run time (see Task Watchdog Timer API Reference)
570 config TASK_WDT_TIMEOUT_S
571 int "Task Watchdog timeout period (seconds)"
576 Timeout period configuration for the Task Watchdog Timer in seconds.
577 This is also configurable at run time (see Task Watchdog Timer API Reference)
579 config TASK_WDT_CHECK_IDLE_TASK_CPU0
580 bool "Watch CPU0 Idle Task"
584 If this option is enabled, the Task Watchdog Timer will watch the CPU0
585 Idle Task. Having the Task Watchdog watch the Idle Task allows for detection
586 of CPU starvation as the Idle Task not being called is usually a symptom of
587 CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household
588 tasks depend on the Idle Task getting some runtime every now and then.
590 config TASK_WDT_CHECK_IDLE_TASK_CPU1
591 bool "Watch CPU1 Idle Task"
592 depends on TASK_WDT && !FREERTOS_UNICORE
595 If this option is enabled, the Task Wtachdog Timer will wach the CPU1
598 #The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
599 #silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
601 bool "Hardware brownout detect & reset"
604 The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
605 a specific value. If this happens, it will reset the chip in order to prevent unintended
608 choice BROWNOUT_DET_LVL_SEL
609 prompt "Brownout voltage level"
610 depends on BROWNOUT_DET
611 default BROWNOUT_DET_LVL_SEL_25
613 The brownout detector will reset the chip when the supply voltage is approximately
614 below this level. Note that there may be some variation of brownout voltage level
615 between each ESP32 chip.
617 #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
618 #of the brownout threshold levels.
619 config BROWNOUT_DET_LVL_SEL_0
620 bool "2.43V +/- 0.05"
621 config BROWNOUT_DET_LVL_SEL_1
622 bool "2.48V +/- 0.05"
623 config BROWNOUT_DET_LVL_SEL_2
624 bool "2.58V +/- 0.05"
625 config BROWNOUT_DET_LVL_SEL_3
626 bool "2.62V +/- 0.05"
627 config BROWNOUT_DET_LVL_SEL_4
628 bool "2.67V +/- 0.05"
629 config BROWNOUT_DET_LVL_SEL_5
630 bool "2.70V +/- 0.05"
631 config BROWNOUT_DET_LVL_SEL_6
632 bool "2.77V +/- 0.05"
633 config BROWNOUT_DET_LVL_SEL_7
634 bool "2.80V +/- 0.05"
637 config BROWNOUT_DET_LVL
639 default 0 if BROWNOUT_DET_LVL_SEL_0
640 default 1 if BROWNOUT_DET_LVL_SEL_1
641 default 2 if BROWNOUT_DET_LVL_SEL_2
642 default 3 if BROWNOUT_DET_LVL_SEL_3
643 default 4 if BROWNOUT_DET_LVL_SEL_4
644 default 5 if BROWNOUT_DET_LVL_SEL_5
645 default 6 if BROWNOUT_DET_LVL_SEL_6
646 default 7 if BROWNOUT_DET_LVL_SEL_7
649 #Reduce PHY TX power when brownout reset
650 config REDUCE_PHY_TX_POWER
651 bool "Reduce PHY TX power when brownout reset"
652 depends on BROWNOUT_DET
655 When brownout reset occurs, reduce PHY TX power to keep the code running
657 # Note about the use of "FRC1" name: currently FRC1 timer is not used for
658 # high resolution timekeeping anymore. Instead the esp_timer API, implemented
659 # using FRC2 timer, is used.
660 # FRC1 name in the option name is kept for compatibility.
661 choice ESP32_TIME_SYSCALL
662 prompt "Timers used for gettimeofday function"
663 default ESP32_TIME_SYSCALL_USE_RTC_FRC1
665 This setting defines which hardware timers are used to
666 implement 'gettimeofday' and 'time' functions in C library.
668 - If both high-resolution and RTC timers are used, timekeeping will
669 continue in deep sleep. Time will be reported at 1 microsecond
670 resolution. This is the default, and the recommended option.
671 - If only high-resolution timer is used, gettimeofday will
672 provide time at microsecond resolution.
673 Time will not be preserved when going into deep sleep mode.
674 - If only RTC timer is used, timekeeping will continue in
675 deep sleep, but time will be measured at 6.(6) microsecond
676 resolution. Also the gettimeofday function itself may take
678 - If no timers are used, gettimeofday and time functions
679 return -1 and set errno to ENOSYS.
680 - When RTC is used for timekeeping, two RTC_STORE registers are
681 used to keep time in deep sleep mode.
683 config ESP32_TIME_SYSCALL_USE_RTC_FRC1
684 bool "RTC and high-resolution timer"
685 config ESP32_TIME_SYSCALL_USE_RTC
687 config ESP32_TIME_SYSCALL_USE_FRC1
688 bool "High-resolution timer"
689 config ESP32_TIME_SYSCALL_USE_NONE
693 choice ESP32_RTC_CLOCK_SOURCE
694 prompt "RTC clock source"
695 default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
697 Choose which clock is used as RTC clock source.
699 - "Internal 150kHz oscillator" option provides lowest deep sleep current
700 consumption, and does not require extra external components. However
701 frequency stability with respect to temperature is poor, so time may
702 drift in deep/light sleep modes.
703 - "External 32kHz crystal" provides better frequency stability, at the
704 expense of slightly higher (1uA) deep sleep current consumption.
705 - "External 32kHz oscillator" allows using 32kHz clock generated by an
706 external circuit. In this case, external clock signal must be connected
707 to 32K_XP pin. Amplitude should be <1.2V in case of sine wave signal,
708 and <1V in case of square wave signal. Common mode voltage should be
709 0.1 < Vcm < 0.5Vamp, where Vamp is the signal amplitude.
710 Additionally, 1nF capacitor must be connected between 32K_XN pin and
711 ground. 32K_XN pin can not be used as a GPIO in this case.
712 - "Internal 8.5MHz oscillator divided by 256" option results in higher
713 deep sleep current (by 5uA) but has better frequency stability than
714 the internal 150kHz oscillator. It does not require external components.
716 config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
717 bool "Internal 150kHz RC oscillator"
718 config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
719 bool "External 32kHz crystal"
720 config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC
721 bool "External 32kHz oscillator at 32K_XP pin"
722 config ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256
723 bool "Internal 8.5MHz oscillator, divided by 256 (~33kHz)"
726 config ESP32_RTC_CLK_CAL_CYCLES
727 int "Number of cycles for RTC_SLOW_CLK calibration"
728 default 3000 if ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
729 default 1024 if ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
730 range 0 27000 if ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL || ESP32_RTC_CLOCK_SOURCE_EXTERNAL_OSC || ESP32_RTC_CLOCK_SOURCE_INTERNAL_8MD256
731 range 0 32766 if ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
733 When the startup code initializes RTC_SLOW_CLK, it can perform
734 calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
735 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
736 by the calibration routine. Higher numbers increase calibration
737 precision, which may be important for applications which spend a lot of
738 time in deep sleep. Lower numbers reduce startup time.
740 When this option is set to 0, clock calibration will not be performed at
741 startup, and approximate clock frequencies will be assumed:
743 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
744 - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
745 In case more value will help improve the definition of the launch of the crystal.
746 If the crystal could not start, it will be switched to internal RC.
748 config ESP32_RTC_XTAL_BOOTSTRAP_CYCLES
749 int "Bootstrap cycles for external 32kHz crystal"
750 depends on ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
754 To reduce the startup time of an external RTC crystal,
755 we bootstrap it with a 32kHz square wave for a fixed number of cycles.
756 Setting 0 will disable bootstrapping (if disabled, the crystal may take
757 longer to start up or fail to oscillate under some conditions).
759 If this value is too high, a faulty crystal may initially start and then fail.
760 If this value is too low, an otherwise good crystal may not start.
762 To accurately determine if the crystal has started,
763 set a larger "Number of cycles for RTC_SLOW_CLK calibration" (about 3000).
765 config ESP32_DEEP_SLEEP_WAKEUP_DELAY
766 int "Extra delay in deep sleep wake stub (in us)"
770 When ESP32 exits deep sleep, the CPU and the flash chip are powered on
771 at the same time. CPU will run deep sleep stub first, and then
772 proceed to load code from flash. Some flash chips need sufficient
773 time to pass between power on and first read operation. By default,
774 without any extra delay, this time is approximately 900us, although
775 some flash chip types need more than that.
777 By default extra delay is set to 2000us. When optimizing startup time
778 for applications which require it, this value may be reduced.
780 If you are seeing "flash read err, 1000" message printed to the
781 console after deep sleep reset, try increasing this value.
783 choice ESP32_XTAL_FREQ_SEL
784 prompt "Main XTAL frequency"
785 default ESP32_XTAL_FREQ_40
787 ESP32 currently supports the following XTAL frequencies:
792 Startup code can automatically estimate XTAL frequency. This feature
793 uses the internal 8MHz oscillator as a reference. Because the internal
794 oscillator frequency is temperature dependent, it is not recommended
795 to use automatic XTAL frequency detection in applications which need
796 to work at high ambient temperatures and use high-temperature
797 qualified chips and modules.
798 config ESP32_XTAL_FREQ_40
800 config ESP32_XTAL_FREQ_26
802 config ESP32_XTAL_FREQ_AUTO
806 # Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
807 config ESP32_XTAL_FREQ
809 default 0 if ESP32_XTAL_FREQ_AUTO
810 default 40 if ESP32_XTAL_FREQ_40
811 default 26 if ESP32_XTAL_FREQ_26
813 config DISABLE_BASIC_ROM_CONSOLE
814 bool "Permanently disable BASIC ROM Console"
817 If set, the first time the app boots it will disable the BASIC ROM Console
818 permanently (by burning an efuse).
820 Otherwise, the BASIC ROM Console starts on reset if no valid bootloader is
823 (Enabling secure boot also disables the BASIC ROM Console by default.)
826 bool "No Binary Blobs"
827 depends on !BT_ENABLED
830 If enabled, this disables the linking of binary libraries in the application build. Note
831 that after enabling this Wi-Fi/Bluetooth will not work.
833 config ESP_TIMER_PROFILING
834 bool "Enable esp_timer profiling features"
837 If enabled, esp_timer_dump will dump information such as number of times
838 the timer was started, number of times the timer has triggered, and the
839 total time it took for the callback to run.
840 This option has some effect on timer performance and the amount of memory
841 used for timer storage, and should only be used for debugging/testing
844 config COMPATIBLE_PRE_V2_1_BOOTLOADERS
845 bool "App compatible with bootloaders before IDF v2.1"
848 Bootloaders before IDF v2.1 did less initialisation of the
849 system clock. This setting needs to be enabled to build an app
850 which can be booted by these older bootloaders.
852 If this setting is enabled, the app can be booted by any bootloader
853 from IDF v1.0 up to the current version.
855 If this setting is disabled, the app can only be booted by bootloaders
856 from IDF v2.1 or newer.
858 Enabling this setting adds approximately 1KB to the app's IRAM usage.
860 config ESP_ERR_TO_NAME_LOOKUP
861 bool "Enable lookup of error code strings"
864 Functions esp_err_to_name() and esp_err_to_name_r() return string
865 representations of error codes from a pre-generated lookup table.
866 This option can be used to turn off the use of the look-up table in
867 order to save memory but this comes at the price of sacrificing
868 distinguishable (meaningful) output string representations.
870 config ESP32_RTCDATA_IN_FAST_MEM
871 bool "Place RTC_DATA_ATTR and RTC_RODATA_ATTR variables into RTC fast memory segment"
873 depends on FREERTOS_UNICORE
875 This option allows to place .rtc_data and .rtc_rodata sections into
876 RTC fast memory segment to free the slow memory region for ULP programs.
877 This option depends on the CONFIG_FREERTOS_UNICORE option because RTC fast memory
878 can be accessed only by PRO_CPU core.
880 endmenu # ESP32-Specific
884 config SW_COEXIST_ENABLE
885 bool "Software controls WiFi/Bluetooth coexistence"
886 depends on BT_ENABLED
889 If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
890 Recommended for heavy traffic scenarios. Both coexistence configuration options are
891 automatically managed, no user intervention is required.
893 choice SW_COEXIST_PREFERENCE
894 prompt "WiFi/Bluetooth coexistence performance preference"
895 depends on SW_COEXIST_ENABLE
896 default SW_COEXIST_PREFERENCE_BALANCE
898 Choose Bluetooth/WiFi/Balance for different preference.
899 If choose WiFi, it will make WiFi performance better. Such, keep WiFi Audio more fluent.
900 If choose Bluetooth, it will make Bluetooth performance better. Such, keep Bluetooth(A2DP) Audio more fluent.
901 If choose Balance, the performance of WiFi and bluetooth will be balance. It's default. Normally, just choose balance, the A2DP audio can play fluently, too.
902 Except config preference in menuconfig, you can also call esp_coex_preference_set() dynamically.
904 config SW_COEXIST_PREFERENCE_WIFI
907 config SW_COEXIST_PREFERENCE_BT
908 bool "Bluetooth(include BR/EDR and BLE)"
910 config SW_COEXIST_PREFERENCE_BALANCE
915 config SW_COEXIST_PREFERENCE_VALUE
917 depends on SW_COEXIST_ENABLE
918 default 0 if SW_COEXIST_PREFERENCE_WIFI
919 default 1 if SW_COEXIST_PREFERENCE_BT
920 default 2 if SW_COEXIST_PREFERENCE_BALANCE
922 config ESP32_WIFI_STATIC_RX_BUFFER_NUM
923 int "Max number of WiFi static RX buffers"
927 Set the number of WiFi static RX buffers. Each buffer takes approximately 1.6KB of RAM.
928 The static rx buffers are allocated when esp_wifi_init is called, they are not freed
929 until esp_wifi_deinit is called.
931 WiFi hardware use these buffers to receive all 802.11 frames.
932 A higher number may allow higher throughput but increases memory use.
934 config ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
935 int "Max number of WiFi dynamic RX buffers"
939 Set the number of WiFi dynamic RX buffers, 0 means unlimited RX buffers will be allocated
940 (provided sufficient free RAM). The size of each dynamic RX buffer depends on the size of
941 the received data frame.
943 For each received data frame, the WiFi driver makes a copy to an RX buffer and then delivers
944 it to the high layer TCP/IP stack. The dynamic RX buffer is freed after the higher layer has
945 successfully received the data frame.
947 For some applications, WiFi data frames may be received faster than the application can
948 process them. In these cases we may run out of memory if RX buffer number is unlimited (0).
950 If a dynamic RX buffer limit is set, it should be at least the number of static RX buffers.
952 choice ESP32_WIFI_TX_BUFFER
953 prompt "Type of WiFi TX buffers"
954 default ESP32_WIFI_DYNAMIC_TX_BUFFER
956 Select type of WiFi TX buffers:
958 If "Static" is selected, WiFi TX buffers are allocated when WiFi is initialized and released
959 when WiFi is de-initialized. The size of each static TX buffer is fixed to about 1.6KB.
961 If "Dynamic" is selected, each WiFi TX buffer is allocated as needed when a data frame is
962 delivered to the Wifi driver from the TCP/IP stack. The buffer is freed after the data frame
963 has been sent by the WiFi driver. The size of each dynamic TX buffer depends on the length
964 of each data frame sent by the TCP/IP layer.
966 If PSRAM is enabled, "Static" should be selected to guarantee enough WiFi TX buffers.
967 If PSRAM is disabled, "Dynamic" should be selected to improve the utilization of RAM.
969 config ESP32_WIFI_STATIC_TX_BUFFER
971 config ESP32_WIFI_DYNAMIC_TX_BUFFER
973 depends on !SPIRAM_USE_MALLOC
976 config ESP32_WIFI_TX_BUFFER_TYPE
978 default 0 if ESP32_WIFI_STATIC_TX_BUFFER
979 default 1 if ESP32_WIFI_DYNAMIC_TX_BUFFER
981 config ESP32_WIFI_STATIC_TX_BUFFER_NUM
982 int "Max number of WiFi static TX buffers"
983 depends on ESP32_WIFI_STATIC_TX_BUFFER
987 Set the number of WiFi static TX buffers. Each buffer takes approximately 1.6KB of RAM.
988 The static RX buffers are allocated when esp_wifi_init() is called, they are not released
989 until esp_wifi_deinit() is called.
991 For each transmitted data frame from the higher layer TCP/IP stack, the WiFi driver makes a
992 copy of it in a TX buffer. For some applications especially UDP applications, the upper
993 layer can deliver frames faster than WiFi layer can transmit. In these cases, we may run out
996 config ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
997 int "Max number of WiFi dynamic TX buffers"
998 depends on ESP32_WIFI_DYNAMIC_TX_BUFFER
1002 Set the number of WiFi dynamic TX buffers. The size of each dynamic TX buffer is not fixed,
1003 it depends on the size of each transmitted data frame.
1005 For each transmitted frame from the higher layer TCP/IP stack, the WiFi driver makes a copy
1006 of it in a TX buffer. For some applications, especially UDP applications, the upper layer
1007 can deliver frames faster than WiFi layer can transmit. In these cases, we may run out of TX
1010 config ESP32_WIFI_CSI_ENABLED
1011 bool "WiFi CSI(Channel State Information)"
1014 Select this option to enable CSI(Channel State Information) feature. CSI takes about
1015 CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM KB of RAM. If CSI is not used, it is better to disable
1016 this feature in order to save memory.
1018 config ESP32_WIFI_AMPDU_TX_ENABLED
1019 bool "WiFi AMPDU TX"
1022 Select this option to enable AMPDU TX feature
1025 config ESP32_WIFI_TX_BA_WIN
1026 int "WiFi AMPDU TX BA window size"
1027 depends on ESP32_WIFI_AMPDU_TX_ENABLED
1031 Set the size of WiFi Block Ack TX window. Generally a bigger value means higher throughput but
1032 more memory. Most of time we should NOT change the default value unless special reason, e.g.
1033 test the maximum UDP TX throughput with iperf etc. For iperf test in shieldbox, the recommended
1036 config ESP32_WIFI_AMPDU_RX_ENABLED
1037 bool "WiFi AMPDU RX"
1040 Select this option to enable AMPDU RX feature
1042 config ESP32_WIFI_RX_BA_WIN
1043 int "WiFi AMPDU RX BA window size"
1044 depends on ESP32_WIFI_AMPDU_RX_ENABLED
1048 Set the size of WiFi Block Ack RX window. Generally a bigger value means higher throughput but
1049 more memory. Most of time we should NOT change the default value unless special reason, e.g.
1050 test the maximum UDP RX throughput with iperf etc. For iperf test in shieldbox, the recommended
1053 config ESP32_WIFI_NVS_ENABLED
1054 bool "WiFi NVS flash"
1057 Select this option to enable WiFi NVS flash
1059 choice ESP32_WIFI_TASK_CORE_ID
1060 depends on !FREERTOS_UNICORE
1061 prompt "WiFi Task Core ID"
1062 default ESP32_WIFI_TASK_PINNED_TO_CORE_0
1064 Pinned WiFi task to core 0 or core 1.
1066 config ESP32_WIFI_TASK_PINNED_TO_CORE_0
1068 config ESP32_WIFI_TASK_PINNED_TO_CORE_1
1076 config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
1077 bool "Store phy calibration data in NVS"
1080 If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
1081 PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
1082 will be performed and stored in NVS. Normally, only partial calibration will be performed.
1083 If this option is disabled, full calibration will be performed.
1085 If it's easy that your board calibrate bad data, choose 'n'.
1086 Two cases for example, you should choose 'n':
1087 1.If your board is easy to be booted up with antenna disconnected.
1088 2.Because of your board design, each time when you do calibration, the result are too unstable.
1089 If unsure, choose 'y'.
1091 config ESP32_PHY_INIT_DATA_IN_PARTITION
1092 bool "Use a partition to store PHY init data"
1095 If enabled, PHY init data will be loaded from a partition.
1096 When using a custom partition table, make sure that PHY data
1097 partition is included (type: 'data', subtype: 'phy').
1098 With default partition tables, this is done automatically.
1099 If PHY init data is stored in a partition, it has to be flashed there,
1100 otherwise runtime error will occur.
1102 If this option is not enabled, PHY init data will be embedded
1103 into the application binary.
1105 If unsure, choose 'n'.
1107 config ESP32_PHY_MAX_WIFI_TX_POWER
1108 int "Max WiFi TX power (dBm)"
1112 Set maximum transmit power for WiFi radio. Actual transmit power for high
1113 data rates may be lower than this setting.
1115 config ESP32_PHY_MAX_TX_POWER
1117 default ESP32_PHY_MAX_WIFI_TX_POWER
1122 menu "Power Management"
1125 bool "Support for power management"
1128 If enabled, application is compiled with support for power management.
1129 This option has run-time overhead (increased interrupt latency,
1130 longer time to enter idle state), and it also reduces accuracy of
1131 RTOS ticks and timers used for timekeeping.
1132 Enable this option if application uses power management APIs.
1134 config PM_DFS_INIT_AUTO
1135 bool "Enable dynamic frequency scaling (DFS) at startup"
1136 depends on PM_ENABLE
1139 If enabled, startup code configures dynamic frequency scaling.
1140 Max CPU frequency is set to CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ setting,
1141 min frequency is set to XTAL frequency.
1142 If disabled, DFS will not be active until the application
1143 configures it using esp_pm_configure function.
1145 config PM_USE_RTC_TIMER_REF
1146 bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
1147 depends on PM_ENABLE && (ESP32_TIME_SYSCALL_USE_RTC || ESP32_TIME_SYSCALL_USE_RTC_FRC1)
1150 When APB clock frequency changes, high-resolution timer (esp_timer)
1151 scale and base value need to be adjusted. Each adjustment may cause
1152 small error, and over time such small errors may cause time drift.
1153 If this option is enabled, RTC timer will be used as a reference to
1154 compensate for the drift.
1155 It is recommended that this option is only used if 32k XTAL is selected
1156 as RTC clock source.
1159 bool "Enable profiling counters for PM locks"
1160 depends on PM_ENABLE
1163 If enabled, esp_pm_* functions will keep track of the amount of time
1164 each of the power management locks has been held, and esp_pm_dump_locks
1165 function will print this information.
1166 This feature can be used to analyze which locks are preventing the chip
1167 from going into a lower power state, and see what time the chip spends
1168 in each power saving mode. This feature does incur some run-time
1169 overhead, so should typically be disabled in production builds.
1172 bool "Enable debug tracing of PM using GPIOs"
1173 depends on PM_ENABLE
1176 If enabled, some GPIOs will be used to signal events such as RTOS ticks,
1177 frequency switching, entry/exit from idle state. Refer to pm_trace.c
1178 file for the list of GPIOs.
1179 This feature is intended to be used when analyzing/debugging behavior
1180 of power management implementation, and should be kept disabled in
1184 endmenu # "Power Management"