3 choice ESP32_DEFAULT_CPU_FREQ_MHZ
5 default ESP32_DEFAULT_CPU_FREQ_160
7 CPU frequency to be set on application startup.
9 config ESP32_DEFAULT_CPU_FREQ_80
11 config ESP32_DEFAULT_CPU_FREQ_160
13 config ESP32_DEFAULT_CPU_FREQ_240
17 config ESP32_DEFAULT_CPU_FREQ_MHZ
19 default 80 if ESP32_DEFAULT_CPU_FREQ_80
20 default 160 if ESP32_DEFAULT_CPU_FREQ_160
21 default 240 if ESP32_DEFAULT_CPU_FREQ_240
24 bool "Reserve memory for two cores"
27 The ESP32 contains two cores. If you plan to only use one, you can disable this item
28 to save some memory. (ToDo: Make this automatically depend on unicore support)
30 config MEMMAP_TRACEMEM
34 config MEMMAP_TRACEMEM_TWOBANKS
39 bool "Use TRAX tracing feature"
41 select MEMMAP_TRACEMEM
43 The ESP32 contains a feature which allows you to trace the execution path the processor
44 has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
45 of memory that can't be used for general purposes anymore. Disable this if you do not know
48 config ESP32_TRAX_TWOBANKS
49 bool "Reserve memory for tracing both pro as well as app cpu execution"
51 depends on ESP32_TRAX && MEMMAP_SMP
52 select MEMMAP_TRACEMEM_TWOBANKS
54 The ESP32 contains a feature which allows you to trace the execution path the processor
55 has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
56 of memory that can't be used for general purposes anymore. Disable this if you do not know
59 # Memory to reverse for trace, used in linker script
60 config TRACEMEM_RESERVE_DRAM
62 default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
63 default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
66 choice ESP32_COREDUMP_TO_FLASH_OR_UART
67 prompt "Core dump destination"
68 default ESP32_ENABLE_COREDUMP_TO_NONE
70 Select place to store core dump: flash, uart or none (to disable core dumps generation).
72 If core dump is configured to be stored in flash and custom partition table is used add
73 corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
74 in the components/partition_table directory.
76 config ESP32_ENABLE_COREDUMP_TO_FLASH
78 select ESP32_ENABLE_COREDUMP
79 config ESP32_ENABLE_COREDUMP_TO_UART
81 select ESP32_ENABLE_COREDUMP
82 config ESP32_ENABLE_COREDUMP_TO_NONE
86 config ESP32_ENABLE_COREDUMP
90 Enables/disable core dump module.
92 config ESP32_CORE_DUMP_UART_DELAY
93 int "Core dump print to UART delay"
94 depends on ESP32_ENABLE_COREDUMP_TO_UART
97 Config delay (in ms) before printing core dump to UART.
98 Delay can be interrupted by pressing Enter key.
100 config ESP32_CORE_DUMP_LOG_LEVEL
101 int "Core dump module logging level"
102 depends on ESP32_ENABLE_COREDUMP
105 Config core dump module logging level (0-5).
107 # Not implemented and/or needs new silicon rev to work
108 config MEMMAP_SPISRAM
109 bool "Use external SPI SRAM chip as main memory"
110 depends on ESP32_NEEDS_NEW_SILICON_REV
113 The ESP32 can control an external SPI SRAM chip, adding the memory it contains to the
114 main memory map. Enable this if you have this hardware and want to use it in the same
117 choice NUMBER_OF_UNIVERSAL_MAC_ADDRESS
118 bool "Number of universally administered (by IEEE) MAC address"
119 default FOUR_UNIVERSAL_MAC_ADDRESS
121 Configure the number of universally administered (by IEEE) MAC addresses.
122 During initialisation, MAC addresses for each network interface are generated or derived from a
123 single base MAC address.
124 If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
125 Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
126 sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
127 If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
128 receive a universally administered MAC address. These are generated sequentially by adding 0
129 and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
130 receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
131 addresses, respectively.
132 When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
133 a custom universal MAC address range, the correct setting will depend on the allocation of MAC
134 addresses in this range (either 2 or 4 per device.)
136 config TWO_UNIVERSAL_MAC_ADDRESS
138 config FOUR_UNIVERSAL_MAC_ADDRESS
142 config NUMBER_OF_UNIVERSAL_MAC_ADDRESS
144 default 2 if TWO_UNIVERSAL_MAC_ADDRESS
145 default 4 if FOUR_UNIVERSAL_MAC_ADDRESS
147 config SYSTEM_EVENT_QUEUE_SIZE
148 int "System event queue size"
151 Config system event queue size in different application.
153 config SYSTEM_EVENT_TASK_STACK_SIZE
154 int "Event loop task stack size"
157 Config system event task stack size in different application.
159 config MAIN_TASK_STACK_SIZE
160 int "Main task stack size"
163 Configure the "main task" stack size. This is the stack of the task
164 which calls app_main(). If app_main() returns then this task is deleted
165 and its stack memory is freed.
167 config IPC_TASK_STACK_SIZE
168 int "Inter-Processor Call (IPC) task stack size"
170 range 512 65536 if !ESP32_APPTRACE_ENABLE
171 range 2048 65536 if ESP32_APPTRACE_ENABLE
173 Configure the IPC tasks stack size. One IPC task runs on each core
174 (in dual core mode), and allows for cross-core function calls.
176 See IPC documentation for more details.
178 The default stack size should be enough for most common use cases.
179 It can be shrunk if you are sure that you do not use any custom
182 choice NEWLIB_STDOUT_LINE_ENDING
183 prompt "Line ending for UART output"
184 default NEWLIB_STDOUT_LINE_ENDING_CRLF
186 This option allows configuring the desired line endings sent to UART
187 when a newline ('\n', LF) appears on stdout.
188 Three options are possible:
190 CRLF: whenever LF is encountered, prepend it with CR
192 LF: no modification is applied, stdout is sent as is
194 CR: each occurence of LF is replaced with CR
196 This option doesn't affect behavior of the UART driver (drivers/uart.h).
198 config NEWLIB_STDOUT_LINE_ENDING_CRLF
200 config NEWLIB_STDOUT_LINE_ENDING_LF
202 config NEWLIB_STDOUT_LINE_ENDING_CR
206 choice NEWLIB_STDIN_LINE_ENDING
207 prompt "Line ending for UART input"
208 default NEWLIB_STDIN_LINE_ENDING_CR
210 This option allows configuring which input sequence on UART produces
211 a newline ('\n', LF) on stdin.
212 Three options are possible:
214 CRLF: CRLF is converted to LF
216 LF: no modification is applied, input is sent to stdin as is
218 CR: each occurence of CR is replaced with LF
220 This option doesn't affect behavior of the UART driver (drivers/uart.h).
222 config NEWLIB_STDIN_LINE_ENDING_CRLF
224 config NEWLIB_STDIN_LINE_ENDING_LF
226 config NEWLIB_STDIN_LINE_ENDING_CR
230 config NEWLIB_NANO_FORMAT
231 bool "Enable 'nano' formatting options for printf/scanf family"
234 ESP32 ROM contains parts of newlib C library, including printf/scanf family
235 of functions. These functions have been compiled with so-called "nano"
236 formatting option. This option doesn't support 64-bit integer formats and C99
237 features, such as positional arguments.
239 For more details about "nano" formatting option, please see newlib readme file,
240 search for '--enable-newlib-nano-formatted-io':
241 https://sourceware.org/newlib/README
243 If this option is enabled, build system will use functions available in
244 ROM, reducing the application binary size. Functions available in ROM run
245 faster than functions which run from flash. Functions available in ROM can
246 also run when flash instruction cache is disabled.
248 If you need 64-bit integer formatting support or C99 features, keep this
252 prompt "UART for console output"
253 default CONSOLE_UART_DEFAULT
255 Select whether to use UART for console output (through stdout and stderr).
257 - Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
258 - If "Custom" is selected, UART0 or UART1 can be chosen,
259 and any pins can be selected.
260 - If "None" is selected, there will be no console output on any UART, except
261 for initial output from ROM bootloader. This output can be further suppressed by
262 bootstrapping GPIO13 pin to low logic level.
264 config CONSOLE_UART_DEFAULT
265 bool "Default: UART0, TX=GPIO1, RX=GPIO3"
266 config CONSOLE_UART_CUSTOM
268 config CONSOLE_UART_NONE
272 choice CONSOLE_UART_NUM
273 prompt "UART peripheral to use for console output (0-1)"
274 depends on CONSOLE_UART_CUSTOM
275 default CONSOLE_UART_CUSTOM_NUM_0
277 Due of a ROM bug, UART2 is not supported for console output
280 config CONSOLE_UART_CUSTOM_NUM_0
282 config CONSOLE_UART_CUSTOM_NUM_1
286 config CONSOLE_UART_NUM
288 default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
289 default 0 if CONSOLE_UART_CUSTOM_NUM_0
290 default 1 if CONSOLE_UART_CUSTOM_NUM_1
292 config CONSOLE_UART_TX_GPIO
293 int "UART TX on GPIO#"
294 depends on CONSOLE_UART_CUSTOM
298 config CONSOLE_UART_RX_GPIO
299 int "UART RX on GPIO#"
300 depends on CONSOLE_UART_CUSTOM
304 config CONSOLE_UART_BAUDRATE
305 int "UART console baud rate"
306 depends on !CONSOLE_UART_NONE
310 config ULP_COPROC_ENABLED
311 bool "Enable Ultra Low Power (ULP) Coprocessor"
314 Set to 'y' if you plan to load a firmware for the coprocessor.
316 If this option is enabled, further coprocessor configuration will appear in the Components menu.
318 config ULP_COPROC_RESERVE_MEM
320 prompt "RTC slow memory reserved for coprocessor" if ULP_COPROC_ENABLED
321 default 512 if ULP_COPROC_ENABLED
322 range 32 8192 if ULP_COPROC_ENABLED
323 default 0 if !ULP_COPROC_ENABLED
324 range 0 0 if !ULP_COPROC_ENABLED
326 Bytes of memory to reserve for ULP coprocessor firmware & data.
328 Data is reserved at the beginning of RTC slow memory.
331 prompt "Panic handler behaviour"
332 default ESP32_PANIC_PRINT_REBOOT
334 If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
335 invoked. Configure the panic handlers action here.
337 config ESP32_PANIC_PRINT_HALT
338 bool "Print registers and halt"
340 Outputs the relevant registers over the serial port and halt the
341 processor. Needs a manual reset to restart.
343 config ESP32_PANIC_PRINT_REBOOT
344 bool "Print registers and reboot"
346 Outputs the relevant registers over the serial port and immediately
349 config ESP32_PANIC_SILENT_REBOOT
352 Just resets the processor without outputting anything
354 config ESP32_PANIC_GDBSTUB
355 bool "Invoke GDBStub"
357 Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
361 config ESP32_DEBUG_OCDAWARE
362 bool "Make exception and panic handlers JTAG/OCD aware"
365 The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
366 instead of panicking, have the debugger stop on the offending instruction.
370 bool "Interrupt watchdog"
373 This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
374 either because a task turned off interrupts and did not turn them on for a long time, or because an
375 interrupt handler did not return. It will try to invoke the panic handler first and failing that
378 config INT_WDT_TIMEOUT_MS
379 int "Interrupt watchdog timeout (ms)"
384 The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
386 config INT_WDT_CHECK_CPU1
387 bool "Also watch CPU1 tick interrupt"
388 depends on INT_WDT && !FREERTOS_UNICORE
391 Also detect if interrupts on CPU 1 are disabled for too long.
397 This watchdog timer can be used to make sure individual tasks are still running.
399 config TASK_WDT_PANIC
400 bool "Invoke panic handler when Task Watchdog is triggered"
404 Normally, the Task Watchdog will only print out a warning if it detects it has not
405 been fed. If this is enabled, it will invoke the panic handler instead, which
406 can then halt or reboot the chip.
408 config TASK_WDT_TIMEOUT_S
409 int "Task watchdog timeout (seconds)"
414 Timeout for the task WDT, in seconds.
416 config TASK_WDT_CHECK_IDLE_TASK
417 bool "Task watchdog watches CPU0 idle task"
421 With this turned on, the task WDT can detect if the idle task is not called within the task
422 watchdog timeout period. The idle task not being called usually is a symptom of another
423 task hoarding the CPU. It is also a bad thing because FreeRTOS household tasks depend on the
424 idle task getting some runtime every now and then. Take Care: With this disabled, this
425 watchdog will trigger if no tasks register themselves within the timeout value.
427 config TASK_WDT_CHECK_IDLE_TASK_CPU1
428 bool "Task watchdog also watches CPU1 idle task"
429 depends on TASK_WDT_CHECK_IDLE_TASK && !FREERTOS_UNICORE
432 Also check the idle task that runs on CPU1.
434 #The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
435 #silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
437 bool "Hardware brownout detect & reset"
440 The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
441 a specific value. If this happens, it will reset the chip in order to prevent unintended
444 choice BROWNOUT_DET_LVL_SEL
445 prompt "Brownout voltage level"
446 depends on BROWNOUT_DET
447 default BROWNOUT_DET_LVL_SEL_25
449 The brownout detector will reset the chip when the supply voltage is below this level.
451 #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
452 #of the brownout threshold levels.
453 config BROWNOUT_DET_LVL_SEL_0
455 config BROWNOUT_DET_LVL_SEL_1
457 config BROWNOUT_DET_LVL_SEL_2
459 config BROWNOUT_DET_LVL_SEL_3
461 config BROWNOUT_DET_LVL_SEL_4
463 config BROWNOUT_DET_LVL_SEL_5
465 config BROWNOUT_DET_LVL_SEL_6
467 config BROWNOUT_DET_LVL_SEL_7
471 config BROWNOUT_DET_LVL
473 default 0 if BROWNOUT_DET_LVL_SEL_0
474 default 1 if BROWNOUT_DET_LVL_SEL_1
475 default 2 if BROWNOUT_DET_LVL_SEL_2
476 default 3 if BROWNOUT_DET_LVL_SEL_3
477 default 4 if BROWNOUT_DET_LVL_SEL_4
478 default 5 if BROWNOUT_DET_LVL_SEL_5
479 default 6 if BROWNOUT_DET_LVL_SEL_6
480 default 7 if BROWNOUT_DET_LVL_SEL_7
483 choice ESP32_TIME_SYSCALL
484 prompt "Timers used for gettimeofday function"
485 default ESP32_TIME_SYSCALL_USE_RTC_FRC1
487 This setting defines which hardware timers are used to
488 implement 'gettimeofday' and 'time' functions in C library.
490 - If only FRC1 timer is used, gettimeofday will provide time at
491 microsecond resolution. Time will not be preserved when going
492 into deep sleep mode.
493 - If both FRC1 and RTC timers are used, timekeeping will
494 continue in deep sleep. Time will be reported at 1 microsecond
496 - If only RTC timer is used, timekeeping will continue in
497 deep sleep, but time will be measured at 6.(6) microsecond
498 resolution. Also the gettimeofday function itself may take
500 - If no timers are used, gettimeofday and time functions
501 return -1 and set errno to ENOSYS.
502 - When RTC is used for timekeeping, two RTC_STORE registers are
503 used to keep time in deep sleep mode.
505 config ESP32_TIME_SYSCALL_USE_RTC
507 config ESP32_TIME_SYSCALL_USE_RTC_FRC1
509 config ESP32_TIME_SYSCALL_USE_FRC1
511 config ESP32_TIME_SYSCALL_USE_NONE
515 choice ESP32_RTC_CLOCK_SOURCE
516 prompt "RTC clock source"
517 default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
519 Choose which clock is used as RTC clock source.
521 config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
522 bool "Internal 150kHz RC oscillator"
523 config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
524 bool "External 32kHz crystal"
527 config ESP32_RTC_CLK_CAL_CYCLES
528 int "Number of cycles for RTC_SLOW_CLK calibration"
532 When the startup code initializes RTC_SLOW_CLK, it can perform
533 calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
534 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
535 by the calibration routine. Higher numbers increase calibration
536 precision, which may be important for applications which spend a lot of
537 time in deep sleep. Lower numbers reduce startup time.
539 When this option is set to 0, clock calibration will not be performed at
540 startup, and approximate clock frequencies will be assumed:
542 - 150000 Hz if internal RC oscillator is used as clock source
543 - 32768 Hz if the 32k crystal oscillator is used
545 config ESP32_DEEP_SLEEP_WAKEUP_DELAY
546 int "Extra delay in deep sleep wake stub (in us)"
550 When ESP32 exits deep sleep, the CPU and the flash chip are powered on
551 at the same time. CPU will run deep sleep stub first, and then
552 proceed to load code from flash. Some flash chips need sufficient
553 time to pass between power on and first read operation. By default,
554 without any extra delay, this time is approximately 900us, although
555 some flash chip types need more than that.
557 By default extra delay is set to 2000us. When optimizing startup time
558 for applications which require it, this value may be reduced.
560 If you are seeing "flash read err, 1000" message printed to the
561 console after deep sleep reset, try increasing this value.
563 choice ESP32_XTAL_FREQ_SEL
564 prompt "Main XTAL frequency"
565 default ESP32_XTAL_FREQ_40
567 ESP32 currently supports the following XTAL frequencies:
572 Startup code can automatically estimate XTAL frequency. This feature
573 uses the internal 8MHz oscillator as a reference. Because the internal
574 oscillator frequency is temperature dependent, it is not recommended
575 to use automatic XTAL frequency detection in applications which need
576 to work at high ambient temperatures and use high-temperature
577 qualified chips and modules.
578 config ESP32_XTAL_FREQ_40
580 config ESP32_XTAL_FREQ_26
582 config ESP32_XTAL_FREQ_AUTO
586 # Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
587 config ESP32_XTAL_FREQ
589 default 0 if ESP32_XTAL_FREQ_AUTO
590 default 40 if ESP32_XTAL_FREQ_40
591 default 26 if ESP32_XTAL_FREQ_26
594 bool "No Binary Blobs"
595 depends on !BT_ENABLED
598 If enabled, this disables the linking of binary libraries in the application build. Note
599 that after enabling this Wi-Fi/Bluetooth will not work.
605 config SW_COEXIST_ENABLE
606 bool "Software controls WiFi/Bluetooth coexistence"
607 depends on BT_ENABLED
610 If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
611 Recommended for heavy traffic scenarios. Both coexistence configuration options are
612 automatically managed, no user intervention is required.
615 config ESP32_WIFI_STATIC_RX_BUFFER_NUM
616 int "Max number of WiFi static RX buffers"
620 Set the number of WiFi static rx buffers. Each buffer takes approximately 1.6KB of RAM.
621 The static rx buffers are allocated when esp_wifi_init is called, they are not freed
622 until esp_wifi_deinit is called.
623 WiFi hardware use these buffers to receive packets, generally larger number for higher
624 throughput but more memory, smaller number for lower throughput but less memory.
626 config ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
627 int "Max number of WiFi dynamic RX buffers"
631 Set the number of WiFi dynamic rx buffers, 0 means no limitation for dynamic rx buffer
632 allocation. The size of dynamic rx buffers is not fixed.
633 For each received packet in static rx buffers, WiFi driver makes a copy
634 to dynamic rx buffers and then deliver it to high layer stack. The dynamic rx buffer
635 is freed when the application, such as socket, successfully received the packet.
636 For some applications, the WiFi driver receiving speed is faster than application
637 consuming speed, we may run out of memory if no limitation for the dynamic rx buffer
638 number. Generally the number of dynamic rx buffer should be no less than static
639 rx buffer number if it is not 0.
641 choice ESP32_WIFI_TX_BUFFER
642 prompt "Type of WiFi TX buffers"
643 default ESP32_WIFI_DYNAMIC_TX_BUFFER
645 Select type of WiFi tx buffers and show the submenu with the number of WiFi tx buffers choice.
646 If "STATIC" is selected, WiFi tx buffers are allocated when WiFi is initialized and released
647 when WiFi is de-initialized. If "DYNAMIC" is selected, WiFi tx buffer is allocated when tx
648 data is delivered from LWIP to WiFi and released when tx data is sent out by WiFi.
649 The size of each static tx buffers is fixed to about 1.6KB and the size of dynamic tx buffers is
650 depend on the length of the data delivered from LWIP.
651 If PSRAM is enabled, "STATIC" should be selected to guarantee enough WiFi tx buffers.
652 If PSRAM is disabled, "DYNAMIC" should be selected to improve the utilization of RAM.
654 config ESP32_WIFI_STATIC_TX_BUFFER
656 config ESP32_WIFI_DYNAMIC_TX_BUFFER
660 config ESP32_WIFI_TX_BUFFER_TYPE
662 default 0 if ESP32_WIFI_STATIC_TX_BUFFER
663 default 1 if ESP32_WIFI_DYNAMIC_TX_BUFFER
665 config ESP32_WIFI_STATIC_TX_BUFFER_NUM
666 int "Max number of WiFi static TX buffers"
667 depends on ESP32_WIFI_STATIC_TX_BUFFER
671 Set the number of WiFi static tx buffers. Each buffer takes approximately 1.6KB of RAM.
672 The static rx buffers are allocated when esp_wifi_init is called, they are not released
673 until esp_wifi_deinit is called.
674 For each tx packet from high layer stack, WiFi driver make a copy of it. For some applications,
675 especially the UDP application, the high layer deliver speed is faster than the WiFi tx
676 speed, we may run out of static tx buffers.
678 config ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
679 int "Max number of WiFi dynamic TX buffers"
680 depends on ESP32_WIFI_DYNAMIC_TX_BUFFER
684 Set the number of WiFi dynamic tx buffers, 0 means no limitation for dynamic tx buffer
685 allocation. The size of dynamic tx buffers is not fixed.
686 For each tx packet from high layer stack, WiFi driver make a copy of it. For some applications,
687 especially the UDP application, the high layer deliver speed is faster than the WiFi tx
688 speed, we may run out of memory if no limitation for the dynamic tx buffer number.
690 config ESP32_WIFI_AMPDU_ENABLED
694 Select this option to enable AMPDU feature
697 config ESP32_WIFI_TX_BA_WIN
698 int "WiFi AMPDU TX BA window size"
699 depends on ESP32_WIFI_AMPDU_ENABLED
703 Set the size of WiFi Block Ack TX window. Generally a bigger value means higher throughput but
704 more memory. Most of time we should NOT change the default value unless special reason, e.g.
705 test the maximum UDP TX throughput with iperf etc. For iperf test in shieldbox, the recommended
708 config ESP32_WIFI_RX_BA_WIN
709 int "WiFi AMPDU RX BA window size"
710 depends on ESP32_WIFI_AMPDU_ENABLED
714 Set the size of WiFi Block Ack RX window. Generally a bigger value means higher throughput but
715 more memory. Most of time we should NOT change the default value unless special reason, e.g.
716 test the maximum UDP RX throughput with iperf etc. For iperf test in shieldbox, the recommended
719 config ESP32_WIFI_NVS_ENABLED
720 bool "WiFi NVS flash"
723 Select this option to enable WiFi NVS flash
729 config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
730 bool "Do phy calibration and store calibration data in NVS"
733 If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
734 PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
735 will be performed and stored in NVS. In all other cases, only partial calibration will be performed.
737 If unsure, choose 'y'.
739 config ESP32_PHY_INIT_DATA_IN_PARTITION
740 bool "Use a partition to store PHY init data"
743 If enabled, PHY init data will be loaded from a partition.
744 When using a custom partition table, make sure that PHY data
745 partition is included (type: 'data', subtype: 'phy').
746 With default partition tables, this is done automatically.
747 If PHY init data is stored in a partition, it has to be flashed there,
748 otherwise runtime error will occur.
750 If this option is not enabled, PHY init data will be embedded
751 into the application binary.
753 If unsure, choose 'n'.
755 config ESP32_PHY_MAX_WIFI_TX_POWER
756 int "Max WiFi TX power (dBm)"
760 Set maximum transmit power for WiFi radio. Actual transmit power for high
761 data rates may be lower than this setting.
763 config ESP32_PHY_MAX_TX_POWER
765 default ESP32_PHY_MAX_WIFI_TX_POWER