3 choice ESP32_DEFAULT_CPU_FREQ_MHZ
5 default ESP32_DEFAULT_CPU_FREQ_160
7 CPU frequency to be set on application startup.
9 config ESP32_DEFAULT_CPU_FREQ_80
11 config ESP32_DEFAULT_CPU_FREQ_160
13 config ESP32_DEFAULT_CPU_FREQ_240
17 config ESP32_DEFAULT_CPU_FREQ_MHZ
19 default 80 if ESP32_DEFAULT_CPU_FREQ_80
20 default 160 if ESP32_DEFAULT_CPU_FREQ_160
21 default 240 if ESP32_DEFAULT_CPU_FREQ_240
24 bool "Support for external, SPI-connected RAM"
27 This enables support for an external SPI RAM chip, connected in parallel with the
31 depends on SPIRAM_SUPPORT
33 config SPIRAM_BOOT_INIT
34 bool "Initialize SPI RAM when booting the ESP32"
37 If this is enabled, the SPI RAM will be enabled during initial boot. Unless you
38 have specific requirements, you'll want to leave this enabled so memory allocated
39 during boot-up can also be placed in SPI RAM.
41 config SPIRAM_IGNORE_NOTFOUND
42 bool "Ignore PSRAM when not found"
44 depends on SPIRAM_BOOT_INIT
46 Normally, if psram initialization is enabled during compile time but not found at runtime, it
47 is seen as an error making the ESP32 panic. If this is enabled, the ESP32 will keep on
48 running but will not add the (non-existing) RAM to any allocator.
51 prompt "SPI RAM access method"
52 default SPIRAM_USE_MALLOC
54 The SPI RAM can be accessed in multiple methods: by just having it available as an unmanaged
55 memory region in the ESP32 memory map, by integrating it in the ESP32s heap as 'special' memory
56 needing heap_caps_malloc to allocate, or by fully integrating it making malloc() also able to
57 return SPI RAM pointers.
59 config SPIRAM_USE_MEMMAP
60 bool "Integrate RAM into ESP32 memory map"
61 config SPIRAM_USE_CAPS_ALLOC
62 bool "Make RAM allocatable using heap_caps_malloc(..., MALLOC_CAP_SPIRAM)"
63 config SPIRAM_USE_MALLOC
64 bool "Make RAM allocatable using malloc() as well"
65 select SUPPORT_STATIC_ALLOCATION
69 prompt "Type of SPI RAM chip in use"
70 default SPIRAM_TYPE_ESPPSRAM32
72 config SPIRAM_TYPE_ESPPSRAM32
73 bool "ESP-PSRAM32 or IS25WP032"
78 default 4194304 if SPIRAM_TYPE_ESPPSRAM32
82 prompt "Set RAM clock speed"
83 default SPIRAM_CACHE_SPEED_40M
85 Select the speed for the SPI RAM chip.
86 If SPI RAM is enabled, we only support three combinations of SPI speed mode we supported now:
88 1. Flash SPI running at 40Mhz and RAM SPI running at 40Mhz
89 2. Flash SPI running at 80Mhz and RAM SPI running at 40Mhz
90 3. Flash SPI running at 80Mhz and RAM SPI running at 80Mhz
92 Note: If the third mode(80Mhz+80Mhz) is enabled, the VSPI port will be occupied by the system.
93 Application code should never touch VSPI hardware in this case. The option to select
94 80MHz will only be visible if the flash SPI speed is also 80MHz. (ESPTOOLPY_FLASHFREQ_80M is true)
96 config SPIRAM_SPEED_40M
97 bool "40MHz clock speed"
98 config SPIRAM_SPEED_80M
99 depends on ESPTOOLPY_FLASHFREQ_80M
100 bool "80MHz clock speed"
103 config SPIRAM_MEMTEST
104 bool "Run memory test on SPI RAM initialization"
106 depends on SPIRAM_BOOT_INIT
108 Runs a rudimentary memory test on initialization. Aborts when memory test fails. Disable this for
109 slightly faster startop.
111 config SPIRAM_CACHE_WORKAROUND
112 bool "Enable workaround for bug in SPI RAM cache for Rev1 ESP32s"
113 depends on SPIRAM_USE_MEMMAP || SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
116 Revision 1 of the ESP32 has a bug that can cause a write to PSRAM not to take place in some situations
117 when the cache line needs to be fetched from external RAM and an interrupt occurs. This enables a
118 fix in the compiler that makes sure the specific code that is vulnerable to this will not be emitted.
120 This will also not use any bits of newlib that are located in ROM, opting for a version that is compiled
121 with the workaround and located in flash instead.
124 config SPIRAM_MALLOC_ALWAYSINTERNAL
125 int "Maximum malloc() size, in bytes, to always put in internal memory"
126 depends on SPIRAM_USE_MALLOC
130 If malloc() is capable of also allocating SPI-connected ram, its allocation strategy will prefer to allocate chunks less
131 than this size in internal memory, while allocations larger than this will be done from external RAM.
132 If allocation from the preferred region fails, an attempt is made to allocate from the non-preferred
133 region instead, so malloc() will not suddenly fail when either internal or external memory is full.
135 config WIFI_LWIP_ALLOCATION_FROM_SPIRAM_FIRST
136 bool "Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, allocate internal memory"
137 depends on SPIRAM_USE_CAPS_ALLOC || SPIRAM_USE_MALLOC
140 Try to allocate memories of WiFi and LWIP in SPIRAM firstly. If failed, try to allocate internal memory then.
142 config SPIRAM_MALLOC_RESERVE_INTERNAL
143 int "Reserve this amount of bytes for data that specifically needs to be in DMA or internal memory"
144 depends on SPIRAM_USE_MALLOC
148 Because the external/internal RAM allocation strategy is not always perfect, it sometimes may happen
149 that the internal memory is entirely filled up. This causes allocations that are specifically done in
150 internal memory, for example the stack for new tasks or memory to service DMA or have memory that's
151 also available when SPI cache is down, to fail. This option reserves a pool specifically for requests
152 like that; the memory in this pool is not given out when a normal malloc() is called.
154 Set this to 0 to disable this feature.
156 Note that because FreeRTOS stacks are forced to internal memory, they will also use this memory pool;
157 be sure to keep this in mind when adjusting this value.
159 config SPIRAM_ALLOW_STACK_EXTERNAL_MEMORY
160 bool "Allow external memory as an argument to xTaskCreateStatic"
162 depends on SPIRAM_USE_MALLOC
164 Because some bits of the ESP32 code environment cannot be recompiled with the cache workaround, normally
165 tasks cannot be safely run with their stack residing in external memory; for this reason xTaskCreate and
166 friends always allocate stack in internal memory and xTaskCreateStatic will check if the memory passed
167 to it is in internal memory. If you have a task that needs a large amount of stack and does not call on
168 ROM code in any way (no direct calls, but also no Bluetooth/WiFi), you can try to disable this and use
169 xTaskCreateStatic to create the tasks stack in external memory.
173 config MEMMAP_TRACEMEM
177 config MEMMAP_TRACEMEM_TWOBANKS
182 bool "Use TRAX tracing feature"
184 select MEMMAP_TRACEMEM
186 The ESP32 contains a feature which allows you to trace the execution path the processor
187 has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
188 of memory that can't be used for general purposes anymore. Disable this if you do not know
191 config ESP32_TRAX_TWOBANKS
192 bool "Reserve memory for tracing both pro as well as app cpu execution"
194 depends on ESP32_TRAX && !FREERTOS_UNICORE
195 select MEMMAP_TRACEMEM_TWOBANKS
197 The ESP32 contains a feature which allows you to trace the execution path the processor
198 has taken through the program. This is stored in a chunk of 32K (16K for single-processor)
199 of memory that can't be used for general purposes anymore. Disable this if you do not know
202 # Memory to reverse for trace, used in linker script
203 config TRACEMEM_RESERVE_DRAM
205 default 0x8000 if MEMMAP_TRACEMEM && MEMMAP_TRACEMEM_TWOBANKS
206 default 0x4000 if MEMMAP_TRACEMEM && !MEMMAP_TRACEMEM_TWOBANKS
209 choice ESP32_COREDUMP_TO_FLASH_OR_UART
210 prompt "Core dump destination"
211 default ESP32_ENABLE_COREDUMP_TO_NONE
213 Select place to store core dump: flash, uart or none (to disable core dumps generation).
215 If core dump is configured to be stored in flash and custom partition table is used add
216 corresponding entry to your CSV. For examples, please see predefined partition table CSV descriptions
217 in the components/partition_table directory.
219 config ESP32_ENABLE_COREDUMP_TO_FLASH
221 select ESP32_ENABLE_COREDUMP
222 config ESP32_ENABLE_COREDUMP_TO_UART
224 select ESP32_ENABLE_COREDUMP
225 config ESP32_ENABLE_COREDUMP_TO_NONE
229 config ESP32_ENABLE_COREDUMP
233 Enables/disable core dump module.
235 config ESP32_CORE_DUMP_UART_DELAY
236 int "Core dump print to UART delay"
237 depends on ESP32_ENABLE_COREDUMP_TO_UART
240 Config delay (in ms) before printing core dump to UART.
241 Delay can be interrupted by pressing Enter key.
243 config ESP32_CORE_DUMP_LOG_LEVEL
244 int "Core dump module logging level"
245 depends on ESP32_ENABLE_COREDUMP
248 Config core dump module logging level (0-5).
250 choice NUMBER_OF_UNIVERSAL_MAC_ADDRESS
251 bool "Number of universally administered (by IEEE) MAC address"
252 default FOUR_UNIVERSAL_MAC_ADDRESS
254 Configure the number of universally administered (by IEEE) MAC addresses.
255 During initialisation, MAC addresses for each network interface are generated or derived from a
256 single base MAC address.
257 If the number of universal MAC addresses is four, all four interfaces (WiFi station, WiFi softap,
258 Bluetooth and Ethernet) receive a universally administered MAC address. These are generated
259 sequentially by adding 0, 1, 2 and 3 (respectively) to the final octet of the base MAC address.
260 If the number of universal MAC addresses is two, only two interfaces (WiFi station and Bluetooth)
261 receive a universally administered MAC address. These are generated sequentially by adding 0
262 and 1 (respectively) to the base MAC address. The remaining two interfaces (WiFi softap and Ethernet)
263 receive local MAC addresses. These are derived from the universal WiFi station and Bluetooth MAC
264 addresses, respectively.
265 When using the default (Espressif-assigned) base MAC address, either setting can be used. When using
266 a custom universal MAC address range, the correct setting will depend on the allocation of MAC
267 addresses in this range (either 2 or 4 per device.)
269 config TWO_UNIVERSAL_MAC_ADDRESS
271 config FOUR_UNIVERSAL_MAC_ADDRESS
275 config NUMBER_OF_UNIVERSAL_MAC_ADDRESS
277 default 2 if TWO_UNIVERSAL_MAC_ADDRESS
278 default 4 if FOUR_UNIVERSAL_MAC_ADDRESS
280 config SYSTEM_EVENT_QUEUE_SIZE
281 int "System event queue size"
284 Config system event queue size in different application.
286 config SYSTEM_EVENT_TASK_STACK_SIZE
287 int "Event loop task stack size"
290 Config system event task stack size in different application.
292 config MAIN_TASK_STACK_SIZE
293 int "Main task stack size"
296 Configure the "main task" stack size. This is the stack of the task
297 which calls app_main(). If app_main() returns then this task is deleted
298 and its stack memory is freed.
300 config IPC_TASK_STACK_SIZE
301 int "Inter-Processor Call (IPC) task stack size"
303 range 512 65536 if !ESP32_APPTRACE_ENABLE
304 range 2048 65536 if ESP32_APPTRACE_ENABLE
306 Configure the IPC tasks stack size. One IPC task runs on each core
307 (in dual core mode), and allows for cross-core function calls.
309 See IPC documentation for more details.
311 The default stack size should be enough for most common use cases.
312 It can be shrunk if you are sure that you do not use any custom
315 config TIMER_TASK_STACK_SIZE
316 int "High-resolution timer task stack size"
320 Configure the stack size of esp_timer/ets_timer task. This task is used
321 to dispatch callbacks of timers created using ets_timer and esp_timer
322 APIs. If you are seing stack overflow errors in timer task, increase
325 Note that this is not the same as FreeRTOS timer task. To configure
326 FreeRTOS timer task size, see "FreeRTOS timer task stack size" option
329 choice NEWLIB_STDOUT_LINE_ENDING
330 prompt "Line ending for UART output"
331 default NEWLIB_STDOUT_LINE_ENDING_CRLF
333 This option allows configuring the desired line endings sent to UART
334 when a newline ('\n', LF) appears on stdout.
335 Three options are possible:
337 CRLF: whenever LF is encountered, prepend it with CR
339 LF: no modification is applied, stdout is sent as is
341 CR: each occurence of LF is replaced with CR
343 This option doesn't affect behavior of the UART driver (drivers/uart.h).
345 config NEWLIB_STDOUT_LINE_ENDING_CRLF
347 config NEWLIB_STDOUT_LINE_ENDING_LF
349 config NEWLIB_STDOUT_LINE_ENDING_CR
353 choice NEWLIB_STDIN_LINE_ENDING
354 prompt "Line ending for UART input"
355 default NEWLIB_STDIN_LINE_ENDING_CR
357 This option allows configuring which input sequence on UART produces
358 a newline ('\n', LF) on stdin.
359 Three options are possible:
361 CRLF: CRLF is converted to LF
363 LF: no modification is applied, input is sent to stdin as is
365 CR: each occurence of CR is replaced with LF
367 This option doesn't affect behavior of the UART driver (drivers/uart.h).
369 config NEWLIB_STDIN_LINE_ENDING_CRLF
371 config NEWLIB_STDIN_LINE_ENDING_LF
373 config NEWLIB_STDIN_LINE_ENDING_CR
377 config NEWLIB_NANO_FORMAT
378 bool "Enable 'nano' formatting options for printf/scanf family"
381 ESP32 ROM contains parts of newlib C library, including printf/scanf family
382 of functions. These functions have been compiled with so-called "nano"
383 formatting option. This option doesn't support 64-bit integer formats and C99
384 features, such as positional arguments.
386 For more details about "nano" formatting option, please see newlib readme file,
387 search for '--enable-newlib-nano-formatted-io':
388 https://sourceware.org/newlib/README
390 If this option is enabled, build system will use functions available in
391 ROM, reducing the application binary size. Functions available in ROM run
392 faster than functions which run from flash. Functions available in ROM can
393 also run when flash instruction cache is disabled.
395 If you need 64-bit integer formatting support or C99 features, keep this
399 prompt "UART for console output"
400 default CONSOLE_UART_DEFAULT
402 Select whether to use UART for console output (through stdout and stderr).
404 - Default is to use UART0 on pins GPIO1(TX) and GPIO3(RX).
405 - If "Custom" is selected, UART0 or UART1 can be chosen,
406 and any pins can be selected.
407 - If "None" is selected, there will be no console output on any UART, except
408 for initial output from ROM bootloader. This output can be further suppressed by
409 bootstrapping GPIO13 pin to low logic level.
411 config CONSOLE_UART_DEFAULT
412 bool "Default: UART0, TX=GPIO1, RX=GPIO3"
413 config CONSOLE_UART_CUSTOM
415 config CONSOLE_UART_NONE
419 choice CONSOLE_UART_NUM
420 prompt "UART peripheral to use for console output (0-1)"
421 depends on CONSOLE_UART_CUSTOM
422 default CONSOLE_UART_CUSTOM_NUM_0
424 Due of a ROM bug, UART2 is not supported for console output
427 config CONSOLE_UART_CUSTOM_NUM_0
429 config CONSOLE_UART_CUSTOM_NUM_1
433 config CONSOLE_UART_NUM
435 default 0 if CONSOLE_UART_DEFAULT || CONSOLE_UART_NONE
436 default 0 if CONSOLE_UART_CUSTOM_NUM_0
437 default 1 if CONSOLE_UART_CUSTOM_NUM_1
439 config CONSOLE_UART_TX_GPIO
440 int "UART TX on GPIO#"
441 depends on CONSOLE_UART_CUSTOM
445 config CONSOLE_UART_RX_GPIO
446 int "UART RX on GPIO#"
447 depends on CONSOLE_UART_CUSTOM
451 config CONSOLE_UART_BAUDRATE
452 int "UART console baud rate"
453 depends on !CONSOLE_UART_NONE
457 config ULP_COPROC_ENABLED
458 bool "Enable Ultra Low Power (ULP) Coprocessor"
461 Set to 'y' if you plan to load a firmware for the coprocessor.
463 If this option is enabled, further coprocessor configuration will appear in the Components menu.
465 config ULP_COPROC_RESERVE_MEM
467 prompt "RTC slow memory reserved for coprocessor" if ULP_COPROC_ENABLED
468 default 512 if ULP_COPROC_ENABLED
469 range 32 8192 if ULP_COPROC_ENABLED
470 default 0 if !ULP_COPROC_ENABLED
471 range 0 0 if !ULP_COPROC_ENABLED
473 Bytes of memory to reserve for ULP coprocessor firmware & data.
475 Data is reserved at the beginning of RTC slow memory.
478 prompt "Panic handler behaviour"
479 default ESP32_PANIC_PRINT_REBOOT
481 If FreeRTOS detects unexpected behaviour or an unhandled exception, the panic handler is
482 invoked. Configure the panic handlers action here.
484 config ESP32_PANIC_PRINT_HALT
485 bool "Print registers and halt"
487 Outputs the relevant registers over the serial port and halt the
488 processor. Needs a manual reset to restart.
490 config ESP32_PANIC_PRINT_REBOOT
491 bool "Print registers and reboot"
493 Outputs the relevant registers over the serial port and immediately
496 config ESP32_PANIC_SILENT_REBOOT
499 Just resets the processor without outputting anything
501 config ESP32_PANIC_GDBSTUB
502 bool "Invoke GDBStub"
504 Invoke gdbstub on the serial port, allowing for gdb to attach to it to do a postmortem
508 config ESP32_DEBUG_OCDAWARE
509 bool "Make exception and panic handlers JTAG/OCD aware"
512 The FreeRTOS panic and unhandled exception handers can detect a JTAG OCD debugger and
513 instead of panicking, have the debugger stop on the offending instruction.
515 config ESP32_DEBUG_STUBS_ENABLE
516 bool "OpenOCD debug stubs"
517 default OPTIMIZATION_LEVEL_DEBUG
518 depends on !ESP32_TRAX
520 Debug stubs are used by OpenOCD to execute pre-compiled onboard code which does some useful debugging,
524 bool "Interrupt watchdog"
527 This watchdog timer can detect if the FreeRTOS tick interrupt has not been called for a certain time,
528 either because a task turned off interrupts and did not turn them on for a long time, or because an
529 interrupt handler did not return. It will try to invoke the panic handler first and failing that
532 config INT_WDT_TIMEOUT_MS
533 int "Interrupt watchdog timeout (ms)"
535 default 300 if !SPIRAM_SUPPORT
536 default 800 if SPIRAM_SUPPORT
539 The timeout of the watchdog, in miliseconds. Make this higher than the FreeRTOS tick rate.
541 config INT_WDT_CHECK_CPU1
542 bool "Also watch CPU1 tick interrupt"
543 depends on INT_WDT && !FREERTOS_UNICORE
546 Also detect if interrupts on CPU 1 are disabled for too long.
549 bool "Initialize Task Watchdog Timer on startup"
552 The Task Watchdog Timer can be used to make sure individual tasks are still
553 running. Enabling this option will cause the Task Watchdog Timer to be
554 initialized automatically at startup. The Task Watchdog timer can be
555 initialized after startup as well (see Task Watchdog Timer API Reference)
557 config TASK_WDT_PANIC
558 bool "Invoke panic handler on Task Watchdog timeout"
562 If this option is enabled, the Task Watchdog Timer will be configured to
563 trigger the panic handler when it times out. This can also be configured
564 at run time (see Task Watchdog Timer API Reference)
566 config TASK_WDT_TIMEOUT_S
567 int "Task Watchdog timeout period (seconds)"
572 Timeout period configuration for the Task Watchdog Timer in seconds.
573 This is also configurable at run time (see Task Watchdog Timer API Reference)
575 config TASK_WDT_CHECK_IDLE_TASK_CPU0
576 bool "Watch CPU0 Idle Task"
580 If this option is enabled, the Task Watchdog Timer will watch the CPU0
581 Idle Task. Having the Task Watchdog watch the Idle Task allows for detection
582 of CPU starvation as the Idle Task not being called is usually a symptom of
583 CPU starvation. Starvation of the Idle Task is detrimental as FreeRTOS household
584 tasks depend on the Idle Task getting some runtime every now and then.
586 config TASK_WDT_CHECK_IDLE_TASK_CPU1
587 bool "Watch CPU1 Idle Task"
588 depends on TASK_WDT && !FREERTOS_UNICORE
591 If this option is enabled, the Task Wtachdog Timer will wach the CPU1
594 #The brownout detector code is disabled (by making it depend on a nonexisting symbol) because the current revision of ESP32
595 #silicon has a bug in the brown-out detector, rendering it unusable for resetting the CPU.
597 bool "Hardware brownout detect & reset"
600 The ESP32 has a built-in brownout detector which can detect if the voltage is lower than
601 a specific value. If this happens, it will reset the chip in order to prevent unintended
604 choice BROWNOUT_DET_LVL_SEL
605 prompt "Brownout voltage level"
606 depends on BROWNOUT_DET
607 default BROWNOUT_DET_LVL_SEL_25
609 The brownout detector will reset the chip when the supply voltage is approximately
610 below this level. Note that there may be some variation of brownout voltage level
611 between each ESP32 chip.
613 #The voltage levels here are estimates, more work needs to be done to figure out the exact voltages
614 #of the brownout threshold levels.
615 config BROWNOUT_DET_LVL_SEL_0
616 bool "2.43V +/- 0.05"
617 config BROWNOUT_DET_LVL_SEL_1
618 bool "2.48V +/- 0.05"
619 config BROWNOUT_DET_LVL_SEL_2
620 bool "2.58V +/- 0.05"
621 config BROWNOUT_DET_LVL_SEL_3
622 bool "2.62V +/- 0.05"
623 config BROWNOUT_DET_LVL_SEL_4
624 bool "2.67V +/- 0.05"
625 config BROWNOUT_DET_LVL_SEL_5
626 bool "2.70V +/- 0.05"
627 config BROWNOUT_DET_LVL_SEL_6
628 bool "2.77V +/- 0.05"
629 config BROWNOUT_DET_LVL_SEL_7
630 bool "2.80V +/- 0.05"
633 config BROWNOUT_DET_LVL
635 default 0 if BROWNOUT_DET_LVL_SEL_0
636 default 1 if BROWNOUT_DET_LVL_SEL_1
637 default 2 if BROWNOUT_DET_LVL_SEL_2
638 default 3 if BROWNOUT_DET_LVL_SEL_3
639 default 4 if BROWNOUT_DET_LVL_SEL_4
640 default 5 if BROWNOUT_DET_LVL_SEL_5
641 default 6 if BROWNOUT_DET_LVL_SEL_6
642 default 7 if BROWNOUT_DET_LVL_SEL_7
645 # Note about the use of "FRC1" name: currently FRC1 timer is not used for
646 # high resolution timekeeping anymore. Instead the esp_timer API, implemented
647 # using FRC2 timer, is used.
648 # FRC1 name in the option name is kept for compatibility.
649 choice ESP32_TIME_SYSCALL
650 prompt "Timers used for gettimeofday function"
651 default ESP32_TIME_SYSCALL_USE_RTC_FRC1
653 This setting defines which hardware timers are used to
654 implement 'gettimeofday' and 'time' functions in C library.
656 - If both high-resolution and RTC timers are used, timekeeping will
657 continue in deep sleep. Time will be reported at 1 microsecond
658 resolution. This is the default, and the recommended option.
659 - If only high-resolution timer is used, gettimeofday will
660 provide time at microsecond resolution.
661 Time will not be preserved when going into deep sleep mode.
662 - If only RTC timer is used, timekeeping will continue in
663 deep sleep, but time will be measured at 6.(6) microsecond
664 resolution. Also the gettimeofday function itself may take
666 - If no timers are used, gettimeofday and time functions
667 return -1 and set errno to ENOSYS.
668 - When RTC is used for timekeeping, two RTC_STORE registers are
669 used to keep time in deep sleep mode.
671 config ESP32_TIME_SYSCALL_USE_RTC_FRC1
672 bool "RTC and high-resolution timer"
673 config ESP32_TIME_SYSCALL_USE_RTC
675 config ESP32_TIME_SYSCALL_USE_FRC1
676 bool "High-resolution timer"
677 config ESP32_TIME_SYSCALL_USE_NONE
681 choice ESP32_RTC_CLOCK_SOURCE
682 prompt "RTC clock source"
683 default ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
685 Choose which clock is used as RTC clock source.
687 config ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
688 bool "Internal 150kHz RC oscillator"
689 config ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
690 bool "External 32kHz crystal"
693 config ESP32_RTC_CLK_CAL_CYCLES
694 int "Number of cycles for RTC_SLOW_CLK calibration"
695 default 3000 if ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
696 default 1024 if ESP32_RTC_CLOCK_SOURCE_INTERNAL_RC
699 When the startup code initializes RTC_SLOW_CLK, it can perform
700 calibration by comparing the RTC_SLOW_CLK frequency with main XTAL
701 frequency. This option sets the number of RTC_SLOW_CLK cycles measured
702 by the calibration routine. Higher numbers increase calibration
703 precision, which may be important for applications which spend a lot of
704 time in deep sleep. Lower numbers reduce startup time.
706 When this option is set to 0, clock calibration will not be performed at
707 startup, and approximate clock frequencies will be assumed:
709 - 150000 Hz if internal RC oscillator is used as clock source. For this use value 1024.
710 - 32768 Hz if the 32k crystal oscillator is used. For this use value 3000 or more.
711 In case more value will help improve the definition of the launch of the crystal.
712 If the crystal could not start, it will be switched to internal RC.
714 config ESP32_RTC_XTAL_BOOTSTRAP_CYCLES
715 int "Bootstrap cycles for external 32kHz crystal"
716 depends on ESP32_RTC_CLOCK_SOURCE_EXTERNAL_CRYSTAL
720 To reduce the startup time of an external RTC crystal,
721 we bootstrap it with a 32kHz square wave for a fixed number of cycles.
722 Setting 0 will disable bootstrapping (if disabled, the crystal may take
723 longer to start up or fail to oscillate under some conditions).
725 If this value is too high, a faulty crystal may initially start and then fail.
726 If this value is too low, an otherwise good crystal may not start.
728 To accurately determine if the crystal has started,
729 set a larger "Number of cycles for RTC_SLOW_CLK calibration" (about 3000).
731 config ESP32_DEEP_SLEEP_WAKEUP_DELAY
732 int "Extra delay in deep sleep wake stub (in us)"
736 When ESP32 exits deep sleep, the CPU and the flash chip are powered on
737 at the same time. CPU will run deep sleep stub first, and then
738 proceed to load code from flash. Some flash chips need sufficient
739 time to pass between power on and first read operation. By default,
740 without any extra delay, this time is approximately 900us, although
741 some flash chip types need more than that.
743 By default extra delay is set to 2000us. When optimizing startup time
744 for applications which require it, this value may be reduced.
746 If you are seeing "flash read err, 1000" message printed to the
747 console after deep sleep reset, try increasing this value.
749 choice ESP32_XTAL_FREQ_SEL
750 prompt "Main XTAL frequency"
751 default ESP32_XTAL_FREQ_40
753 ESP32 currently supports the following XTAL frequencies:
758 Startup code can automatically estimate XTAL frequency. This feature
759 uses the internal 8MHz oscillator as a reference. Because the internal
760 oscillator frequency is temperature dependent, it is not recommended
761 to use automatic XTAL frequency detection in applications which need
762 to work at high ambient temperatures and use high-temperature
763 qualified chips and modules.
764 config ESP32_XTAL_FREQ_40
766 config ESP32_XTAL_FREQ_26
768 config ESP32_XTAL_FREQ_AUTO
772 # Keep these values in sync with rtc_xtal_freq_t enum in soc/rtc.h
773 config ESP32_XTAL_FREQ
775 default 0 if ESP32_XTAL_FREQ_AUTO
776 default 40 if ESP32_XTAL_FREQ_40
777 default 26 if ESP32_XTAL_FREQ_26
779 config DISABLE_BASIC_ROM_CONSOLE
780 bool "Permanently disable BASIC ROM Console"
783 If set, the first time the app boots it will disable the BASIC ROM Console
784 permanently (by burning an efuse).
786 Otherwise, the BASIC ROM Console starts on reset if no valid bootloader is
789 (Enabling secure boot also disables the BASIC ROM Console by default.)
792 bool "No Binary Blobs"
793 depends on !BT_ENABLED
796 If enabled, this disables the linking of binary libraries in the application build. Note
797 that after enabling this Wi-Fi/Bluetooth will not work.
799 config ESP_TIMER_PROFILING
800 bool "Enable esp_timer profiling features"
803 If enabled, esp_timer_dump will dump information such as number of times
804 the timer was started, number of times the timer has triggered, and the
805 total time it took for the callback to run.
806 This option has some effect on timer performance and the amount of memory
807 used for timer storage, and should only be used for debugging/testing
810 config COMPATIBLE_PRE_V2_1_BOOTLOADERS
811 bool "App compatible with bootloaders before IDF v2.1"
814 Bootloaders before IDF v2.1 did less initialisation of the
815 system clock. This setting needs to be enabled to build an app
816 which can be booted by these older bootloaders.
818 If this setting is enabled, the app can be booted by any bootloader
819 from IDF v1.0 up to the current version.
821 If this setting is disabled, the app can only be booted by bootloaders
822 from IDF v2.1 or newer.
824 Enabling this setting adds approximately 1KB to the app's IRAM usage.
826 config ESP_ERR_TO_NAME_LOOKUP
827 bool "Enable lookup of error code strings"
830 Functions esp_err_to_name() and esp_err_to_name_r() return string
831 representations of error codes from a pre-generated lookup table.
832 This option can be used to turn off the use of the look-up table in
833 order to save memory but this comes at the price of sacrificing
834 distinguishable (meaningful) output string representations.
836 endmenu # ESP32-Specific
840 config SW_COEXIST_ENABLE
841 bool "Software controls WiFi/Bluetooth coexistence"
842 depends on BT_ENABLED
845 If enabled, WiFi & Bluetooth coexistence is controlled by software rather than hardware.
846 Recommended for heavy traffic scenarios. Both coexistence configuration options are
847 automatically managed, no user intervention is required.
849 choice SW_COEXIST_PREFERENCE
850 prompt "WiFi/Bluetooth coexistence performance preference"
851 depends on SW_COEXIST_ENABLE
852 default SW_COEXIST_PREFERENCE_BALANCE
854 Choose Bluetooth/WiFi/Balance for different preference.
855 If choose WiFi, it will make WiFi performance better. Such, keep WiFi Audio more fluent.
856 If choose Bluetooth, it will make Bluetooth performance better. Such, keep Bluetooth(A2DP) Audio more fluent.
857 If choose Balance, the performance of WiFi and bluetooth will be balance. It's default. Normally, just choose balance, the A2DP audio can play fluently, too.
858 Except config preference in menuconfig, you can also call esp_coex_preference_set() dynamically.
860 config SW_COEXIST_PREFERENCE_WIFI
863 config SW_COEXIST_PREFERENCE_BT
864 bool "Bluetooth(include BR/EDR and BLE)"
866 config SW_COEXIST_PREFERENCE_BALANCE
871 config SW_COEXIST_PREFERENCE_VALUE
873 depends on SW_COEXIST_ENABLE
874 default 0 if SW_COEXIST_PREFERENCE_WIFI
875 default 1 if SW_COEXIST_PREFERENCE_BT
876 default 2 if SW_COEXIST_PREFERENCE_BALANCE
878 config ESP32_WIFI_STATIC_RX_BUFFER_NUM
879 int "Max number of WiFi static RX buffers"
883 Set the number of WiFi static RX buffers. Each buffer takes approximately 1.6KB of RAM.
884 The static rx buffers are allocated when esp_wifi_init is called, they are not freed
885 until esp_wifi_deinit is called.
887 WiFi hardware use these buffers to receive all 802.11 frames.
888 A higher number may allow higher throughput but increases memory use.
890 config ESP32_WIFI_DYNAMIC_RX_BUFFER_NUM
891 int "Max number of WiFi dynamic RX buffers"
895 Set the number of WiFi dynamic RX buffers, 0 means unlimited RX buffers will be allocated
896 (provided sufficient free RAM). The size of each dynamic RX buffer depends on the size of
897 the received data frame.
899 For each received data frame, the WiFi driver makes a copy to an RX buffer and then delivers
900 it to the high layer TCP/IP stack. The dynamic RX buffer is freed after the higher layer has
901 successfully received the data frame.
903 For some applications, WiFi data frames may be received faster than the application can
904 process them. In these cases we may run out of memory if RX buffer number is unlimited (0).
906 If a dynamic RX buffer limit is set, it should be at least the number of static RX buffers.
908 choice ESP32_WIFI_TX_BUFFER
909 prompt "Type of WiFi TX buffers"
910 default ESP32_WIFI_DYNAMIC_TX_BUFFER
912 Select type of WiFi TX buffers:
914 If "Static" is selected, WiFi TX buffers are allocated when WiFi is initialized and released
915 when WiFi is de-initialized. The size of each static TX buffer is fixed to about 1.6KB.
917 If "Dynamic" is selected, each WiFi TX buffer is allocated as needed when a data frame is
918 delivered to the Wifi driver from the TCP/IP stack. The buffer is freed after the data frame
919 has been sent by the WiFi driver. The size of each dynamic TX buffer depends on the length
920 of each data frame sent by the TCP/IP layer.
922 If PSRAM is enabled, "Static" should be selected to guarantee enough WiFi TX buffers.
923 If PSRAM is disabled, "Dynamic" should be selected to improve the utilization of RAM.
925 config ESP32_WIFI_STATIC_TX_BUFFER
927 config ESP32_WIFI_DYNAMIC_TX_BUFFER
929 depends on !SPIRAM_USE_MALLOC
932 config ESP32_WIFI_TX_BUFFER_TYPE
934 default 0 if ESP32_WIFI_STATIC_TX_BUFFER
935 default 1 if ESP32_WIFI_DYNAMIC_TX_BUFFER
937 config ESP32_WIFI_STATIC_TX_BUFFER_NUM
938 int "Max number of WiFi static TX buffers"
939 depends on ESP32_WIFI_STATIC_TX_BUFFER
943 Set the number of WiFi static TX buffers. Each buffer takes approximately 1.6KB of RAM.
944 The static RX buffers are allocated when esp_wifi_init() is called, they are not released
945 until esp_wifi_deinit() is called.
947 For each transmitted data frame from the higher layer TCP/IP stack, the WiFi driver makes a
948 copy of it in a TX buffer. For some applications especially UDP applications, the upper
949 layer can deliver frames faster than WiFi layer can transmit. In these cases, we may run out
952 config ESP32_WIFI_DYNAMIC_TX_BUFFER_NUM
953 int "Max number of WiFi dynamic TX buffers"
954 depends on ESP32_WIFI_DYNAMIC_TX_BUFFER
958 Set the number of WiFi dynamic TX buffers. The size of each dynamic TX buffer is not fixed,
959 it depends on the size of each transmitted data frame.
961 For each transmitted frame from the higher layer TCP/IP stack, the WiFi driver makes a copy
962 of it in a TX buffer. For some applications, especially UDP applications, the upper layer
963 can deliver frames faster than WiFi layer can transmit. In these cases, we may run out of TX
966 config ESP32_WIFI_CSI_ENABLED
967 bool "WiFi CSI(Channel State Information)"
970 Select this option to enable CSI(Channel State Information) feature. CSI takes about
971 CONFIG_ESP32_WIFI_STATIC_RX_BUFFER_NUM KB of RAM. If CSI is not used, it is better to disable
972 this feature in order to save memory.
974 config ESP32_WIFI_AMPDU_TX_ENABLED
978 Select this option to enable AMPDU TX feature
981 config ESP32_WIFI_TX_BA_WIN
982 int "WiFi AMPDU TX BA window size"
983 depends on ESP32_WIFI_AMPDU_TX_ENABLED
987 Set the size of WiFi Block Ack TX window. Generally a bigger value means higher throughput but
988 more memory. Most of time we should NOT change the default value unless special reason, e.g.
989 test the maximum UDP TX throughput with iperf etc. For iperf test in shieldbox, the recommended
992 config ESP32_WIFI_AMPDU_RX_ENABLED
996 Select this option to enable AMPDU RX feature
998 config ESP32_WIFI_RX_BA_WIN
999 int "WiFi AMPDU RX BA window size"
1000 depends on ESP32_WIFI_AMPDU_RX_ENABLED
1004 Set the size of WiFi Block Ack RX window. Generally a bigger value means higher throughput but
1005 more memory. Most of time we should NOT change the default value unless special reason, e.g.
1006 test the maximum UDP RX throughput with iperf etc. For iperf test in shieldbox, the recommended
1009 config ESP32_WIFI_NVS_ENABLED
1010 bool "WiFi NVS flash"
1013 Select this option to enable WiFi NVS flash
1015 choice ESP32_WIFI_TASK_CORE_ID
1016 depends on !FREERTOS_UNICORE
1017 prompt "WiFi Task Core ID"
1018 default ESP32_WIFI_TASK_PINNED_TO_CORE_0
1020 Pinned WiFi task to core 0 or core 1.
1022 config ESP32_WIFI_TASK_PINNED_TO_CORE_0
1024 config ESP32_WIFI_TASK_PINNED_TO_CORE_1
1032 config ESP32_PHY_CALIBRATION_AND_DATA_STORAGE
1033 bool "Store phy calibration data in NVS"
1036 If this option is enabled, NVS will be initialized and calibration data will be loaded from there.
1037 PHY calibration will be skipped on deep sleep wakeup. If calibration data is not found, full calibration
1038 will be performed and stored in NVS. Normally, only partial calibration will be performed.
1039 If this option is disabled, full calibration will be performed.
1041 If it's easy that your board calibrate bad data, choose 'n'.
1042 Two cases for example, you should choose 'n':
1043 1.If your board is easy to be booted up with antenna disconnected.
1044 2.Because of your board design, each time when you do calibration, the result are too unstable.
1045 If unsure, choose 'y'.
1047 config ESP32_PHY_INIT_DATA_IN_PARTITION
1048 bool "Use a partition to store PHY init data"
1051 If enabled, PHY init data will be loaded from a partition.
1052 When using a custom partition table, make sure that PHY data
1053 partition is included (type: 'data', subtype: 'phy').
1054 With default partition tables, this is done automatically.
1055 If PHY init data is stored in a partition, it has to be flashed there,
1056 otherwise runtime error will occur.
1058 If this option is not enabled, PHY init data will be embedded
1059 into the application binary.
1061 If unsure, choose 'n'.
1063 config ESP32_PHY_MAX_WIFI_TX_POWER
1064 int "Max WiFi TX power (dBm)"
1068 Set maximum transmit power for WiFi radio. Actual transmit power for high
1069 data rates may be lower than this setting.
1071 config ESP32_PHY_MAX_TX_POWER
1073 default ESP32_PHY_MAX_WIFI_TX_POWER
1078 menu "Power Management"
1081 bool "Support for power management"
1084 If enabled, application is compiled with support for power management.
1085 This option has run-time overhead (increased interrupt latency,
1086 longer time to enter idle state), and it also reduces accuracy of
1087 RTOS ticks and timers used for timekeeping.
1088 Enable this option if application uses power management APIs.
1090 config PM_DFS_INIT_AUTO
1091 bool "Enable dynamic frequency scaling (DFS) at startup"
1092 depends on PM_ENABLE
1095 If enabled, startup code configures dynamic frequency scaling.
1096 Max CPU frequency is set to CONFIG_ESP32_DEFAULT_CPU_FREQ_MHZ setting,
1097 min frequency is set to XTAL frequency.
1098 If disabled, DFS will not be active until the application
1099 configures it using esp_pm_configure function.
1101 config PM_USE_RTC_TIMER_REF
1102 bool "Use RTC timer to prevent time drift (EXPERIMENTAL)"
1103 depends on PM_ENABLE && (ESP32_TIME_SYSCALL_USE_RTC || ESP32_TIME_SYSCALL_USE_RTC_FRC1)
1106 When APB clock frequency changes, high-resolution timer (esp_timer)
1107 scale and base value need to be adjusted. Each adjustment may cause
1108 small error, and over time such small errors may cause time drift.
1109 If this option is enabled, RTC timer will be used as a reference to
1110 compensate for the drift.
1111 It is recommended that this option is only used if 32k XTAL is selected
1112 as RTC clock source.
1115 bool "Enable profiling counters for PM locks"
1116 depends on PM_ENABLE
1119 If enabled, esp_pm_* functions will keep track of the amount of time
1120 each of the power management locks has been held, and esp_pm_dump_locks
1121 function will print this information.
1122 This feature can be used to analyze which locks are preventing the chip
1123 from going into a lower power state, and see what time the chip spends
1124 in each power saving mode. This feature does incur some run-time
1125 overhead, so should typically be disabled in production builds.
1128 bool "Enable debug tracing of PM using GPIOs"
1129 depends on PM_ENABLE
1132 If enabled, some GPIOs will be used to signal events such as RTOS ticks,
1133 frequency switching, entry/exit from idle state. Refer to pm_trace.c
1134 file for the list of GPIOs.
1135 This feature is intended to be used when analyzing/debugging behavior
1136 of power management implementation, and should be kept disabled in
1140 endmenu # "Power Management"