granicus.if.org Git - esp-idf/blob - components/bt/bluedroid/stack/include/stack/hcidefs.h

   1 /******************************************************************************
   2  *
   3  *  Copyright (C) 1999-2014 Broadcom Corporation
   4  *
   5  *  Licensed under the Apache License, Version 2.0 (the "License");
   6  *  you may not use this file except in compliance with the License.
   7  *  You may obtain a copy of the License at:
   8  *
   9  *  http://www.apache.org/licenses/LICENSE-2.0
  10  *
  11  *  Unless required by applicable law or agreed to in writing, software
  12  *  distributed under the License is distributed on an "AS IS" BASIS,
  13  *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  14  *  See the License for the specific language governing permissions and
  15  *  limitations under the License.
  16  *
  17  ******************************************************************************/
  18
  19 #ifndef HCIDEFS_H
  20 #define HCIDEFS_H
  21
  22 #include "common/bt_target.h"
  23
  24 #include "stack/bt_types.h"
  25
  26 #define HCI_PROTO_VERSION     0x01      /* Version for BT spec 1.1          */
  27 #define HCI_PROTO_VERSION_1_2 0x02      /* Version for BT spec 1.2          */
  28 #define HCI_PROTO_VERSION_2_0 0x03      /* Version for BT spec 2.0          */
  29 #define HCI_PROTO_VERSION_2_1 0x04      /* Version for BT spec 2.1 [Lisbon] */
  30 #define HCI_PROTO_VERSION_3_0 0x05      /* Version for BT spec 3.0          */
  31 #define HCI_PROTO_VERSION_4_0 0x06      /* Version for BT spec 4.0          */
  32 #define HCI_PROTO_VERSION_4_1 0x07      /* Version for BT spec 4.1          */
  33 #define HCI_PROTO_VERSION_4_2 0x08      /* Version for BT spec 4.2          */
  34 #define HCI_PROTO_REVISION    0x000C    /* Current implementation version   */
  35 /*
  36 **  Definitions for HCI groups
  37 */
  38 #define HCI_GRP_LINK_CONTROL_CMDS       (0x01 << 10)            /* 0x0400 */
  39 #define HCI_GRP_LINK_POLICY_CMDS        (0x02 << 10)            /* 0x0800 */
  40 #define HCI_GRP_HOST_CONT_BASEBAND_CMDS (0x03 << 10)            /* 0x0C00 */
  41 #define HCI_GRP_INFORMATIONAL_PARAMS    (0x04 << 10)            /* 0x1000 */
  42 #define HCI_GRP_STATUS_PARAMS           (0x05 << 10)            /* 0x1400 */
  43 #define HCI_GRP_TESTING_CMDS            (0x06 << 10)            /* 0x1800 */
  44
  45 #define HCI_GRP_VENDOR_SPECIFIC         (0x3F << 10)            /* 0xFC00 */
  46
  47 /* Group occupies high 6 bits of the HCI command rest is opcode itself */
  48 #define HCI_OGF(p)  (UINT8)((0xFC00 & (p)) >> 10)
  49 #define HCI_OCF(p)  ( 0x3FF & (p))
  50
  51 /*
  52 **  Definitions for Link Control Commands
  53 */
  54 /* Following opcode is used only in command complete event for flow control */
  55 #define HCI_COMMAND_NONE                0x0000
  56
  57 /* Commands of HCI_GRP_LINK_CONTROL_CMDS group */
  58 #define HCI_INQUIRY                     (0x0001 | HCI_GRP_LINK_CONTROL_CMDS)
  59 #define HCI_INQUIRY_CANCEL              (0x0002 | HCI_GRP_LINK_CONTROL_CMDS)
  60 #define HCI_PERIODIC_INQUIRY_MODE       (0x0003 | HCI_GRP_LINK_CONTROL_CMDS)
  61 #define HCI_EXIT_PERIODIC_INQUIRY_MODE  (0x0004 | HCI_GRP_LINK_CONTROL_CMDS)
  62 #define HCI_CREATE_CONNECTION           (0x0005 | HCI_GRP_LINK_CONTROL_CMDS)
  63 #define HCI_DISCONNECT                  (0x0006 | HCI_GRP_LINK_CONTROL_CMDS)
  64 #define HCI_ADD_SCO_CONNECTION          (0x0007 | HCI_GRP_LINK_CONTROL_CMDS)
  65 #define HCI_CREATE_CONNECTION_CANCEL    (0x0008 | HCI_GRP_LINK_CONTROL_CMDS)
  66 #define HCI_ACCEPT_CONNECTION_REQUEST   (0x0009 | HCI_GRP_LINK_CONTROL_CMDS)
  67 #define HCI_REJECT_CONNECTION_REQUEST   (0x000A | HCI_GRP_LINK_CONTROL_CMDS)
  68 #define HCI_LINK_KEY_REQUEST_REPLY      (0x000B | HCI_GRP_LINK_CONTROL_CMDS)
  69 #define HCI_LINK_KEY_REQUEST_NEG_REPLY  (0x000C | HCI_GRP_LINK_CONTROL_CMDS)
  70 #define HCI_PIN_CODE_REQUEST_REPLY      (0x000D | HCI_GRP_LINK_CONTROL_CMDS)
  71 #define HCI_PIN_CODE_REQUEST_NEG_REPLY  (0x000E | HCI_GRP_LINK_CONTROL_CMDS)
  72 #define HCI_CHANGE_CONN_PACKET_TYPE     (0x000F | HCI_GRP_LINK_CONTROL_CMDS)
  73 #define HCI_AUTHENTICATION_REQUESTED    (0x0011 | HCI_GRP_LINK_CONTROL_CMDS)
  74 #define HCI_SET_CONN_ENCRYPTION         (0x0013 | HCI_GRP_LINK_CONTROL_CMDS)
  75 #define HCI_CHANGE_CONN_LINK_KEY        (0x0015 | HCI_GRP_LINK_CONTROL_CMDS)
  76 #define HCI_MASTER_LINK_KEY             (0x0017 | HCI_GRP_LINK_CONTROL_CMDS)
  77 #define HCI_RMT_NAME_REQUEST            (0x0019 | HCI_GRP_LINK_CONTROL_CMDS)
  78 #define HCI_RMT_NAME_REQUEST_CANCEL     (0x001A | HCI_GRP_LINK_CONTROL_CMDS)
  79 #define HCI_READ_RMT_FEATURES           (0x001B | HCI_GRP_LINK_CONTROL_CMDS)
  80 #define HCI_READ_RMT_EXT_FEATURES       (0x001C | HCI_GRP_LINK_CONTROL_CMDS)
  81 #define HCI_READ_RMT_VERSION_INFO       (0x001D | HCI_GRP_LINK_CONTROL_CMDS)
  82 #define HCI_READ_RMT_CLOCK_OFFSET       (0x001F | HCI_GRP_LINK_CONTROL_CMDS)
  83 #define HCI_READ_LMP_HANDLE             (0x0020 | HCI_GRP_LINK_CONTROL_CMDS)
  84 #define HCI_SETUP_ESCO_CONNECTION       (0x0028 | HCI_GRP_LINK_CONTROL_CMDS)
  85 #define HCI_ACCEPT_ESCO_CONNECTION      (0x0029 | HCI_GRP_LINK_CONTROL_CMDS)
  86 #define HCI_REJECT_ESCO_CONNECTION      (0x002A | HCI_GRP_LINK_CONTROL_CMDS)
  87 #define HCI_IO_CAPABILITY_REQUEST_REPLY (0x002B | HCI_GRP_LINK_CONTROL_CMDS)
  88 #define HCI_USER_CONF_REQUEST_REPLY     (0x002C | HCI_GRP_LINK_CONTROL_CMDS)
  89 #define HCI_USER_CONF_VALUE_NEG_REPLY   (0x002D | HCI_GRP_LINK_CONTROL_CMDS)
  90 #define HCI_USER_PASSKEY_REQ_REPLY      (0x002E | HCI_GRP_LINK_CONTROL_CMDS)
  91 #define HCI_USER_PASSKEY_REQ_NEG_REPLY  (0x002F | HCI_GRP_LINK_CONTROL_CMDS)
  92 #define HCI_REM_OOB_DATA_REQ_REPLY      (0x0030 | HCI_GRP_LINK_CONTROL_CMDS)
  93 #define HCI_REM_OOB_DATA_REQ_NEG_REPLY  (0x0033 | HCI_GRP_LINK_CONTROL_CMDS)
  94 #define HCI_IO_CAP_REQ_NEG_REPLY        (0x0034 | HCI_GRP_LINK_CONTROL_CMDS)
  95
  96 /* AMP HCI */
  97 #define HCI_CREATE_PHYSICAL_LINK        (0x0035 | HCI_GRP_LINK_CONTROL_CMDS)
  98 #define HCI_ACCEPT_PHYSICAL_LINK        (0x0036 | HCI_GRP_LINK_CONTROL_CMDS)
  99 #define HCI_DISCONNECT_PHYSICAL_LINK    (0x0037 | HCI_GRP_LINK_CONTROL_CMDS)
 100 #define HCI_CREATE_LOGICAL_LINK         (0x0038 | HCI_GRP_LINK_CONTROL_CMDS)
 101 #define HCI_ACCEPT_LOGICAL_LINK         (0x0039 | HCI_GRP_LINK_CONTROL_CMDS)
 102 #define HCI_DISCONNECT_LOGICAL_LINK     (0x003A | HCI_GRP_LINK_CONTROL_CMDS)
 103 #define HCI_LOGICAL_LINK_CANCEL         (0x003B | HCI_GRP_LINK_CONTROL_CMDS)
 104 #define HCI_FLOW_SPEC_MODIFY            (0x003C | HCI_GRP_LINK_CONTROL_CMDS)
 105
 106 #define HCI_ENH_SETUP_ESCO_CONNECTION   (0x003D | HCI_GRP_LINK_CONTROL_CMDS)
 107 #define HCI_ENH_ACCEPT_ESCO_CONNECTION  (0x003E | HCI_GRP_LINK_CONTROL_CMDS)
 108
 109 /* ConnectionLess Broadcast */
 110 #define HCI_TRUNCATED_PAGE              (0x003F | HCI_GRP_LINK_CONTROL_CMDS)
 111 #define HCI_TRUNCATED_PAGE_CANCEL       (0x0040 | HCI_GRP_LINK_CONTROL_CMDS)
 112 #define HCI_SET_CLB                     (0x0041 | HCI_GRP_LINK_CONTROL_CMDS)
 113 #define HCI_RECEIVE_CLB                 (0x0042 | HCI_GRP_LINK_CONTROL_CMDS)
 114 #define HCI_START_SYNC_TRAIN            (0x0043 | HCI_GRP_LINK_CONTROL_CMDS)
 115 #define HCI_RECEIVE_SYNC_TRAIN          (0x0044 | HCI_GRP_LINK_CONTROL_CMDS)
 116
 117 #define HCI_LINK_CTRL_CMDS_FIRST        HCI_INQUIRY
 118 #define HCI_LINK_CTRL_CMDS_LAST         HCI_RECEIVE_SYNC_TRAIN
 119
 120 /* Commands of HCI_GRP_LINK_POLICY_CMDS */
 121 #define HCI_HOLD_MODE                   (0x0001 | HCI_GRP_LINK_POLICY_CMDS)
 122 #define HCI_SNIFF_MODE                  (0x0003 | HCI_GRP_LINK_POLICY_CMDS)
 123 #define HCI_EXIT_SNIFF_MODE             (0x0004 | HCI_GRP_LINK_POLICY_CMDS)
 124 #define HCI_PARK_MODE                   (0x0005 | HCI_GRP_LINK_POLICY_CMDS)
 125 #define HCI_EXIT_PARK_MODE              (0x0006 | HCI_GRP_LINK_POLICY_CMDS)
 126 #define HCI_QOS_SETUP                   (0x0007 | HCI_GRP_LINK_POLICY_CMDS)
 127 #define HCI_ROLE_DISCOVERY              (0x0009 | HCI_GRP_LINK_POLICY_CMDS)
 128 #define HCI_SWITCH_ROLE                 (0x000B | HCI_GRP_LINK_POLICY_CMDS)
 129 #define HCI_READ_POLICY_SETTINGS        (0x000C | HCI_GRP_LINK_POLICY_CMDS)
 130 #define HCI_WRITE_POLICY_SETTINGS       (0x000D | HCI_GRP_LINK_POLICY_CMDS)
 131 #define HCI_READ_DEF_POLICY_SETTINGS    (0x000E | HCI_GRP_LINK_POLICY_CMDS)
 132 #define HCI_WRITE_DEF_POLICY_SETTINGS   (0x000F | HCI_GRP_LINK_POLICY_CMDS)
 133 #define HCI_FLOW_SPECIFICATION          (0x0010 | HCI_GRP_LINK_POLICY_CMDS)
 134 #define HCI_SNIFF_SUB_RATE              (0x0011 | HCI_GRP_LINK_POLICY_CMDS)
 135
 136 #define HCI_LINK_POLICY_CMDS_FIRST      HCI_HOLD_MODE
 137 #define HCI_LINK_POLICY_CMDS_LAST       HCI_SNIFF_SUB_RATE
 138
 139
 140 /* Commands of HCI_GRP_HOST_CONT_BASEBAND_CMDS */
 141 #define HCI_SET_EVENT_MASK              (0x0001 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 142 #define HCI_RESET                       (0x0003 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 143 #define HCI_SET_EVENT_FILTER            (0x0005 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 144 #define HCI_FLUSH                       (0x0008 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 145 #define HCI_READ_PIN_TYPE               (0x0009 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 146 #define HCI_WRITE_PIN_TYPE              (0x000A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 147 #define HCI_CREATE_NEW_UNIT_KEY         (0x000B | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 148 #define HCI_GET_MWS_TRANS_LAYER_CFG     (0x000C | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 149 #define HCI_READ_STORED_LINK_KEY        (0x000D | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 150 #define HCI_WRITE_STORED_LINK_KEY       (0x0011 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 151 #define HCI_DELETE_STORED_LINK_KEY      (0x0012 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 152 #define HCI_CHANGE_LOCAL_NAME           (0x0013 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 153 #define HCI_READ_LOCAL_NAME             (0x0014 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 154 #define HCI_READ_CONN_ACCEPT_TOUT       (0x0015 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 155 #define HCI_WRITE_CONN_ACCEPT_TOUT      (0x0016 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 156 #define HCI_READ_PAGE_TOUT              (0x0017 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 157 #define HCI_WRITE_PAGE_TOUT             (0x0018 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 158 #define HCI_READ_SCAN_ENABLE            (0x0019 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 159 #define HCI_WRITE_SCAN_ENABLE           (0x001A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 160 #define HCI_READ_PAGESCAN_CFG           (0x001B | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 161 #define HCI_WRITE_PAGESCAN_CFG          (0x001C | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 162 #define HCI_READ_INQUIRYSCAN_CFG        (0x001D | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 163 #define HCI_WRITE_INQUIRYSCAN_CFG       (0x001E | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 164 #define HCI_READ_AUTHENTICATION_ENABLE  (0x001F | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 165 #define HCI_WRITE_AUTHENTICATION_ENABLE (0x0020 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 166 #define HCI_READ_ENCRYPTION_MODE        (0x0021 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 167 #define HCI_WRITE_ENCRYPTION_MODE       (0x0022 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 168 #define HCI_READ_CLASS_OF_DEVICE        (0x0023 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 169 #define HCI_WRITE_CLASS_OF_DEVICE       (0x0024 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 170 #define HCI_READ_VOICE_SETTINGS         (0x0025 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 171 #define HCI_WRITE_VOICE_SETTINGS        (0x0026 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 172 #define HCI_READ_AUTO_FLUSH_TOUT        (0x0027 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 173 #define HCI_WRITE_AUTO_FLUSH_TOUT       (0x0028 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 174 #define HCI_READ_NUM_BCAST_REXMITS      (0x0029 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 175 #define HCI_WRITE_NUM_BCAST_REXMITS     (0x002A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 176 #define HCI_READ_HOLD_MODE_ACTIVITY     (0x002B | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 177 #define HCI_WRITE_HOLD_MODE_ACTIVITY    (0x002C | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 178 #define HCI_READ_TRANSMIT_POWER_LEVEL   (0x002D | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 179 #define HCI_READ_SCO_FLOW_CTRL_ENABLE   (0x002E | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 180 #define HCI_WRITE_SCO_FLOW_CTRL_ENABLE  (0x002F | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 181 #define HCI_SET_HC_TO_HOST_FLOW_CTRL    (0x0031 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 182 #define HCI_HOST_BUFFER_SIZE            (0x0033 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 183 #define HCI_HOST_NUM_PACKETS_DONE       (0x0035 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 184 #define HCI_READ_LINK_SUPER_TOUT        (0x0036 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 185 #define HCI_WRITE_LINK_SUPER_TOUT       (0x0037 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 186 #define HCI_READ_NUM_SUPPORTED_IAC      (0x0038 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 187 #define HCI_READ_CURRENT_IAC_LAP        (0x0039 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 188 #define HCI_WRITE_CURRENT_IAC_LAP       (0x003A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 189 #define HCI_READ_PAGESCAN_PERIOD_MODE   (0x003B | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 190 #define HCI_WRITE_PAGESCAN_PERIOD_MODE  (0x003C | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 191 #define HCI_READ_PAGESCAN_MODE          (0x003D | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 192 #define HCI_WRITE_PAGESCAN_MODE         (0x003E | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 193 #define HCI_SET_AFH_CHANNELS            (0x003F | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 194
 195 #define HCI_READ_INQSCAN_TYPE           (0x0042 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 196 #define HCI_WRITE_INQSCAN_TYPE          (0x0043 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 197 #define HCI_READ_INQUIRY_MODE           (0x0044 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 198 #define HCI_WRITE_INQUIRY_MODE          (0x0045 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 199 #define HCI_READ_PAGESCAN_TYPE          (0x0046 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 200 #define HCI_WRITE_PAGESCAN_TYPE         (0x0047 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 201 #define HCI_READ_AFH_ASSESSMENT_MODE    (0x0048 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 202 #define HCI_WRITE_AFH_ASSESSMENT_MODE   (0x0049 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 203 #define HCI_READ_EXT_INQ_RESPONSE       (0x0051 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 204 #define HCI_WRITE_EXT_INQ_RESPONSE      (0x0052 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 205 #define HCI_REFRESH_ENCRYPTION_KEY      (0x0053 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 206 #define HCI_READ_SIMPLE_PAIRING_MODE    (0x0055 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 207 #define HCI_WRITE_SIMPLE_PAIRING_MODE   (0x0056 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 208 #define HCI_READ_LOCAL_OOB_DATA         (0x0057 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 209 #define HCI_READ_INQ_TX_POWER_LEVEL     (0x0058 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 210 #define HCI_WRITE_INQ_TX_POWER_LEVEL    (0x0059 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 211 #define HCI_READ_ERRONEOUS_DATA_RPT     (0x005A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 212 #define HCI_WRITE_ERRONEOUS_DATA_RPT    (0x005B | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 213 #define HCI_ENHANCED_FLUSH              (0x005F | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 214 #define HCI_SEND_KEYPRESS_NOTIF         (0x0060 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 215
 216
 217 /* AMP HCI */
 218 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT  (0x0061 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 219 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT (0x0062 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 220 #define HCI_SET_EVENT_MASK_PAGE_2             (0x0063 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 221 #define HCI_READ_LOCATION_DATA                (0x0064 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 222 #define HCI_WRITE_LOCATION_DATA               (0x0065 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 223 #define HCI_READ_FLOW_CONTROL_MODE            (0x0066 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 224 #define HCI_WRITE_FLOW_CONTROL_MODE           (0x0067 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 225 #define HCI_READ_BE_FLUSH_TOUT                (0x0069 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 226 #define HCI_WRITE_BE_FLUSH_TOUT               (0x006A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 227 #define HCI_SHORT_RANGE_MODE                  (0x006B | HCI_GRP_HOST_CONT_BASEBAND_CMDS) /* 802.11 only */
 228 #define HCI_READ_LE_HOST_SUPPORT              (0x006C | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 229 #define HCI_WRITE_LE_HOST_SUPPORT             (0x006D | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 230
 231
 232 /* MWS coexistence */
 233 #define HCI_SET_MWS_CHANNEL_PARAMETERS          (0x006E | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 234 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION    (0x006F | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 235 #define HCI_SET_MWS_SIGNALING                   (0x0070 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 236 #define HCI_SET_MWS_TRANSPORT_LAYER             (0x0071 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 237 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE        (0x0072 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 238 #define HCI_SET_MWS_PATTERN_CONFIGURATION       (0x0073 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 239
 240 /* Connectionless Broadcast */
 241 #define HCI_SET_RESERVED_LT_ADDR                (0x0074 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 242 #define HCI_DELETE_RESERVED_LT_ADDR             (0x0075 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 243 #define HCI_WRITE_CLB_DATA                      (0x0076 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 244 #define HCI_READ_SYNC_TRAIN_PARAM               (0x0077 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 245 #define HCI_WRITE_SYNC_TRAIN_PARAM              (0x0078 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 246
 247 #define HCI_READ_SECURE_CONNS_SUPPORT           (0x0079 | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 248 #define HCI_WRITE_SECURE_CONNS_SUPPORT          (0x007A | HCI_GRP_HOST_CONT_BASEBAND_CMDS)
 249 #define HCI_CONT_BASEBAND_CMDS_FIRST    HCI_SET_EVENT_MASK
 250 #define HCI_CONT_BASEBAND_CMDS_LAST     HCI_READ_SYNC_TRAIN_PARAM
 251
 252
 253 /* Commands of HCI_GRP_INFORMATIONAL_PARAMS group */
 254 #define HCI_READ_LOCAL_VERSION_INFO     (0x0001 | HCI_GRP_INFORMATIONAL_PARAMS)
 255 #define HCI_READ_LOCAL_SUPPORTED_CMDS   (0x0002 | HCI_GRP_INFORMATIONAL_PARAMS)
 256 #define HCI_READ_LOCAL_FEATURES         (0x0003 | HCI_GRP_INFORMATIONAL_PARAMS)
 257 #define HCI_READ_LOCAL_EXT_FEATURES     (0x0004 | HCI_GRP_INFORMATIONAL_PARAMS)
 258 #define HCI_READ_BUFFER_SIZE            (0x0005 | HCI_GRP_INFORMATIONAL_PARAMS)
 259 #define HCI_READ_COUNTRY_CODE           (0x0007 | HCI_GRP_INFORMATIONAL_PARAMS)
 260 #define HCI_READ_BD_ADDR                (0x0009 | HCI_GRP_INFORMATIONAL_PARAMS)
 261 #define HCI_READ_DATA_BLOCK_SIZE        (0x000A | HCI_GRP_INFORMATIONAL_PARAMS)
 262 #define HCI_READ_LOCAL_SUPPORTED_CODECS (0x000B | HCI_GRP_INFORMATIONAL_PARAMS)
 263
 264 #define HCI_INFORMATIONAL_CMDS_FIRST    HCI_READ_LOCAL_VERSION_INFO
 265 #define HCI_INFORMATIONAL_CMDS_LAST     HCI_READ_LOCAL_SUPPORTED_CODECS
 266
 267
 268 /* Commands of HCI_GRP_STATUS_PARAMS group */
 269 #define HCI_READ_FAILED_CONTACT_COUNT   (0x0001 | HCI_GRP_STATUS_PARAMS)
 270 #define HCI_RESET_FAILED_CONTACT_COUNT  (0x0002 | HCI_GRP_STATUS_PARAMS)
 271 #define HCI_GET_LINK_QUALITY            (0x0003 | HCI_GRP_STATUS_PARAMS)
 272 #define HCI_READ_RSSI                   (0x0005 | HCI_GRP_STATUS_PARAMS)
 273 #define HCI_READ_AFH_CH_MAP             (0x0006 | HCI_GRP_STATUS_PARAMS)
 274 #define HCI_READ_CLOCK                  (0x0007 | HCI_GRP_STATUS_PARAMS)
 275 #define HCI_READ_ENCR_KEY_SIZE          (0x0008 | HCI_GRP_STATUS_PARAMS)
 276
 277 /* AMP HCI */
 278 #define HCI_READ_LOCAL_AMP_INFO         (0x0009 | HCI_GRP_STATUS_PARAMS)
 279 #define HCI_READ_LOCAL_AMP_ASSOC        (0x000A | HCI_GRP_STATUS_PARAMS)
 280 #define HCI_WRITE_REMOTE_AMP_ASSOC      (0x000B | HCI_GRP_STATUS_PARAMS)
 281
 282 #define HCI_STATUS_PARAMS_CMDS_FIRST    HCI_READ_FAILED_CONTACT_COUNT
 283 #define HCI_STATUS_PARAMS_CMDS_LAST     HCI_WRITE_REMOTE_AMP_ASSOC
 284
 285 /* Commands of HCI_GRP_TESTING_CMDS group */
 286 #define HCI_READ_LOOPBACK_MODE          (0x0001 | HCI_GRP_TESTING_CMDS)
 287 #define HCI_WRITE_LOOPBACK_MODE         (0x0002 | HCI_GRP_TESTING_CMDS)
 288 #define HCI_ENABLE_DEV_UNDER_TEST_MODE  (0x0003 | HCI_GRP_TESTING_CMDS)
 289 #define HCI_WRITE_SIMP_PAIR_DEBUG_MODE  (0x0004 | HCI_GRP_TESTING_CMDS)
 290
 291 /* AMP HCI */
 292 #define HCI_ENABLE_AMP_RCVR_REPORTS     (0x0007 | HCI_GRP_TESTING_CMDS)
 293 #define HCI_AMP_TEST_END                (0x0008 | HCI_GRP_TESTING_CMDS)
 294 #define HCI_AMP_TEST                    (0x0009 | HCI_GRP_TESTING_CMDS)
 295
 296 #define HCI_TESTING_CMDS_FIRST          HCI_READ_LOOPBACK_MODE
 297 #define HCI_TESTING_CMDS_LAST           HCI_AMP_TEST
 298
 299 #define HCI_VENDOR_CMDS_FIRST           0x0001
 300 #define HCI_VENDOR_CMDS_LAST            0xFFFF
 301 #define HCI_VSC_MULTI_AV_HANDLE         0x0AAA
 302 #define HCI_VSC_BURST_MODE_HANDLE       0x0BBB
 303
 304 /* BLE HCI */
 305 #define HCI_GRP_BLE_CMDS                (0x08 << 10)
 306 /* Commands of BLE Controller setup and configuration */
 307 #define HCI_BLE_SET_EVENT_MASK          (0x0001 | HCI_GRP_BLE_CMDS)
 308 #define HCI_BLE_READ_BUFFER_SIZE        (0x0002 | HCI_GRP_BLE_CMDS)
 309 #define HCI_BLE_READ_LOCAL_SPT_FEAT     (0x0003 | HCI_GRP_BLE_CMDS)
 310 #define HCI_BLE_WRITE_LOCAL_SPT_FEAT    (0x0004 | HCI_GRP_BLE_CMDS)
 311 #define HCI_BLE_WRITE_RANDOM_ADDR       (0x0005 | HCI_GRP_BLE_CMDS)
 312 #define HCI_BLE_WRITE_ADV_PARAMS        (0x0006 | HCI_GRP_BLE_CMDS)
 313 #define HCI_BLE_READ_ADV_CHNL_TX_POWER  (0x0007 | HCI_GRP_BLE_CMDS)
 314 #define HCI_BLE_WRITE_ADV_DATA          (0x0008 | HCI_GRP_BLE_CMDS)
 315 #define HCI_BLE_WRITE_SCAN_RSP_DATA     (0x0009 | HCI_GRP_BLE_CMDS)
 316 #define HCI_BLE_WRITE_ADV_ENABLE        (0x000A | HCI_GRP_BLE_CMDS)
 317 #define HCI_BLE_WRITE_SCAN_PARAMS       (0x000B | HCI_GRP_BLE_CMDS)
 318 #define HCI_BLE_WRITE_SCAN_ENABLE       (0x000C | HCI_GRP_BLE_CMDS)
 319 #define HCI_BLE_CREATE_LL_CONN          (0x000D | HCI_GRP_BLE_CMDS)
 320 #define HCI_BLE_CREATE_CONN_CANCEL      (0x000E | HCI_GRP_BLE_CMDS)
 321 #define HCI_BLE_READ_WHITE_LIST_SIZE    (0x000F | HCI_GRP_BLE_CMDS)
 322 #define HCI_BLE_CLEAR_WHITE_LIST        (0x0010 | HCI_GRP_BLE_CMDS)
 323 #define HCI_BLE_ADD_WHITE_LIST          (0x0011 | HCI_GRP_BLE_CMDS)
 324 #define HCI_BLE_REMOVE_WHITE_LIST       (0x0012 | HCI_GRP_BLE_CMDS)
 325 #define HCI_BLE_UPD_LL_CONN_PARAMS      (0x0013 | HCI_GRP_BLE_CMDS)
 326 #define HCI_BLE_SET_HOST_CHNL_CLASS     (0x0014 | HCI_GRP_BLE_CMDS)
 327 #define HCI_BLE_READ_CHNL_MAP           (0x0015 | HCI_GRP_BLE_CMDS)
 328 #define HCI_BLE_READ_REMOTE_FEAT        (0x0016 | HCI_GRP_BLE_CMDS)
 329 #define HCI_BLE_ENCRYPT                 (0x0017 | HCI_GRP_BLE_CMDS)
 330 #define HCI_BLE_RAND                    (0x0018 | HCI_GRP_BLE_CMDS)
 331 #define HCI_BLE_START_ENC               (0x0019 | HCI_GRP_BLE_CMDS)
 332 #define HCI_BLE_LTK_REQ_REPLY           (0x001A | HCI_GRP_BLE_CMDS)
 333 #define HCI_BLE_LTK_REQ_NEG_REPLY       (0x001B | HCI_GRP_BLE_CMDS)
 334 #define HCI_BLE_READ_SUPPORTED_STATES   (0x001C | HCI_GRP_BLE_CMDS)
 335 /*0x001D, 0x001E and 0x001F are reserved*/
 336 #define HCI_BLE_RECEIVER_TEST           (0x001D | HCI_GRP_BLE_CMDS)
 337 #define HCI_BLE_TRANSMITTER_TEST        (0x001E | HCI_GRP_BLE_CMDS)
 338 /* BLE TEST COMMANDS */
 339 #define HCI_BLE_TEST_END                (0x001F | HCI_GRP_BLE_CMDS)
 340 #define HCI_BLE_RC_PARAM_REQ_REPLY      (0x0020 | HCI_GRP_BLE_CMDS)
 341 #define HCI_BLE_RC_PARAM_REQ_NEG_REPLY  (0x0021 | HCI_GRP_BLE_CMDS)
 342
 343 #define HCI_BLE_SET_DATA_LENGTH             (0x0022 | HCI_GRP_BLE_CMDS)
 344 #define HCI_BLE_READ_DEFAULT_DATA_LENGTH    (0x0023 | HCI_GRP_BLE_CMDS)
 345 #define HCI_BLE_WRITE_DEFAULT_DATA_LENGTH   (0x0024 | HCI_GRP_BLE_CMDS)
 346
 347 #define HCI_BLE_ADD_DEV_RESOLVING_LIST      (0x0027 | HCI_GRP_BLE_CMDS)
 348 #define HCI_BLE_RM_DEV_RESOLVING_LIST       (0x0028 | HCI_GRP_BLE_CMDS)
 349 #define HCI_BLE_CLEAR_RESOLVING_LIST        (0x0029 | HCI_GRP_BLE_CMDS)
 350 #define HCI_BLE_READ_RESOLVING_LIST_SIZE    (0x002A | HCI_GRP_BLE_CMDS)
 351 #define HCI_BLE_READ_RESOLVABLE_ADDR_PEER   (0x002B | HCI_GRP_BLE_CMDS)
 352 #define HCI_BLE_READ_RESOLVABLE_ADDR_LOCAL  (0x002C | HCI_GRP_BLE_CMDS)
 353 #define HCI_BLE_SET_ADDR_RESOLUTION_ENABLE  (0x002D | HCI_GRP_BLE_CMDS)
 354 #define HCI_BLE_SET_RAND_PRIV_ADDR_TIMOUT   (0x002E | HCI_GRP_BLE_CMDS)
 355
 356 /* LE Get Vendor Capabilities Command OCF */
 357 #define HCI_BLE_VENDOR_CAP_OCF    (0x0153 | HCI_GRP_VENDOR_SPECIFIC)
 358
 359 /* Multi adv OCF */
 360 #define HCI_BLE_MULTI_ADV_OCF     (0x0154 | HCI_GRP_VENDOR_SPECIFIC)
 361
 362 /* Batch scan OCF */
 363 #define HCI_BLE_BATCH_SCAN_OCF    (0x0156 | HCI_GRP_VENDOR_SPECIFIC)
 364
 365 /* ADV filter OCF */
 366 #define HCI_BLE_ADV_FILTER_OCF    (0x0157 | HCI_GRP_VENDOR_SPECIFIC)
 367
 368 /* Tracking OCF */
 369 #define HCI_BLE_TRACK_ADV_OCF     (0x0158 | HCI_GRP_VENDOR_SPECIFIC)
 370
 371 /* Energy info OCF */
 372 #define HCI_BLE_ENERGY_INFO_OCF   (0x0159 | HCI_GRP_VENDOR_SPECIFIC)
 373
 374 /* Extended BLE Scan parameters OCF */
 375 #define HCI_BLE_EXTENDED_SCAN_PARAMS_OCF  (0x0160 | HCI_GRP_VENDOR_SPECIFIC)
 376
 377 /* subcode for multi adv feature */
 378 #define BTM_BLE_MULTI_ADV_SET_PARAM                     0x01
 379 #define BTM_BLE_MULTI_ADV_WRITE_ADV_DATA                0x02
 380 #define BTM_BLE_MULTI_ADV_WRITE_SCAN_RSP_DATA           0x03
 381 #define BTM_BLE_MULTI_ADV_SET_RANDOM_ADDR               0x04
 382 #define BTM_BLE_MULTI_ADV_ENB                           0x05
 383
 384 /* multi adv VSE subcode */
 385 #define HCI_VSE_SUBCODE_BLE_MULTI_ADV_ST_CHG       0x55 /* multi adv instance state change */
 386
 387 /* subcode for batch scan feature */
 388 #define BTM_BLE_BATCH_SCAN_ENB_DISAB_CUST_FEATURE      0x01
 389 #define BTM_BLE_BATCH_SCAN_SET_STORAGE_PARAM           0x02
 390 #define BTM_BLE_BATCH_SCAN_SET_PARAMS                  0x03
 391 #define BTM_BLE_BATCH_SCAN_READ_RESULTS                0x04
 392
 393 /* batch scan VSE subcode */
 394 #define HCI_VSE_SUBCODE_BLE_THRESHOLD_SUB_EVT      0x54 /* Threshold event */
 395
 396 /* tracking sub event */
 397 #define HCI_VSE_SUBCODE_BLE_TRACKING_SUB_EVT       0x56 /* Tracking event */
 398
 399 /* LE supported states definition */
 400 #define HCI_LE_ADV_STATE          0x00000001
 401 #define HCI_LE_SCAN_STATE         0x00000002
 402 #define HCI_LE_INIT_STATE         0x00000004
 403 #define HCI_LE_CONN_SL_STATE      0x00000008
 404 #define HCI_LE_ADV_SCAN_STATE     0x00000010
 405 #define HCI_LE_ADV_INIT_STATE     0x00000020
 406 #define HCI_LE_ADV_MA_STATE       0x00000040
 407 #define HCI_LE_ADV_SL_STATE       0x00000080
 408 #define HCI_LE_SCAN_INIT_STATE    0x00000100
 409 #define HCI_LE_SCAN_MA_STATE      0x00000200
 410 #define HCI_LE_SCAN_SL_STATE      0x00000400
 411 #define HCI_LE_INIT_MA_STATE      0x00000800
 412
 413 /* LE Supported States */
 414 /* Non Connectable Adv state is supported. 0x0000000000000001 */
 415 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK          0x01
 416 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF           0
 417 #define HCI_LE_STATES_NON_CONN_ADV_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASK)
 418
 419 /*Scanneable Connectable Adv state  is supported. 0x0000000000000002 */
 420 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASK          0x02
 421 #define HCI_SUPP_LE_STATESSCAN_ADV_OFF           0
 422 #define HCI_LE_STATES_SCAN_ADV_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATESSCAN_ADV_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASK)
 423
 424 /* Connectable Adv state is supported. 0x0000000000000004 */
 425 #define HCI_SUPP_LE_STATES_CONN_ADV_MASK          0x04
 426 #define HCI_SUPP_LE_STATES_CONN_ADV_OFF           0
 427 #define HCI_LE_STATES_CONN_ADV_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_CONN_ADV_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASK)
 428
 429 /* Hi duty Cycle Directed Adv state is supported. 0x0000000000000008 */
 430 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK          0x08
 431 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF           0
 432 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASK)
 433
 434 /* Passive Scan state is supported. 0x0000000000000010 */
 435 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASK          0x10
 436 #define HCI_SUPP_LE_STATES_PASS_SCAN_OFF           0
 437 #define HCI_LE_STATES_PASS_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASK)
 438
 439 /* Active Scan state is supported. 0x0000000000000020 */
 440 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK          0x20
 441 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF           0
 442 #define HCI_LE_STATES_ACTIVE_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASK)
 443
 444 /* Initiating state is supported. 0x0000000000000040 (or connection state in master role is also supported) */
 445 #define HCI_SUPP_LE_STATES_INIT_MASK          0x40
 446 #define HCI_SUPP_LE_STATES_INIT_OFF           0
 447 #define HCI_LE_STATES_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_INIT_OFF] & HCI_SUPP_LE_STATES_INIT_MASK)
 448
 449 /*connection state in slave  role is also supported. 0x0000000000000080 */
 450 #define HCI_SUPP_LE_STATES_SLAVE_MASK          0x80
 451 #define HCI_SUPP_LE_STATES_SLAVE_OFF           0
 452 #define HCI_LE_STATES_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_SLAVE_OFF] & HCI_SUPP_LE_STATES_SLAVE_MASK)
 453
 454 /* Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000100 */
 455 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK          0x01
 456 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF           1
 457 #define HCI_LE_STATES_NON_CONN_ADV_PASS_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_PASS_SCAN_MASK)
 458
 459 /*Scannable Adv state and Passive Scanning State combination is supported. 0x0000000000000200 */
 460 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK          0x02
 461 #define HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF           1
 462 #define HCI_LE_STATES_SCAN_ADV_PASS_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_PASS_SCAN_MASK)
 463
 464 /*Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000000400 */
 465 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK          0x04
 466 #define HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF           1
 467 #define HCI_LE_STATES_CONN_ADV_PASS_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_PASS_SCAN_MASK)
 468
 469 /*High Duty Cycl Directed ADv and Passive Scanning State combination is supported. 0x0000000000000800 */
 470 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK          0x08
 471 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF           1
 472 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_PASS_SCAN_OFF)
 473
 474 /*Non Connectable Adv state and Passive Scanning State combination is supported. 0x0000000000001000 */
 475 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK          0x10
 476 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF           1
 477 #define HCI_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_ACTIVE_SCAN_MASK)
 478
 479 /*Scannable Adv state and Active Scanning State combination is supported. 0x0000000000002000 */
 480 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK          0x20
 481 #define HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF           1
 482 #define HCI_LE_STATES_SCAN_ADV_ACTIVE_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_ACTIVE_SCAN_MASK)
 483
 484 /*Connectable Adv state and Active Scanning State combination is supported. 0x0000000000004000 */
 485 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK          0x40
 486 #define HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF           1
 487 #define HCI_LE_STATES_CONN_ADV_ACTIVE_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_ACTIVE_SCAN_MASK)
 488
 489 /*High Duty Cycl Directed ADv and ACtive Scanning State combination is supported. 0x0000000000008000 */
 490 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK          0x80
 491 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF           1
 492 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_MASK] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_ACTIVE_SCAN_OFF)
 493
 494 /*Non-Connectable Adv state and Initiating State combination is supported. 0x0000000000010000 */
 495 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK          0x01
 496 #define HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF           2
 497 #define HCI_LE_STATES_NON_CONN_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_NON_CONN_INIT_OFF] & HCI_SUPP_LE_STATES_NON_CONN_INIT_MASK)
 498
 499 /* Scannable Adv state and Initiating State combination is supported. 0x0000000000020000 */
 500 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK          0x02
 501 #define HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF           2
 502 #define HCI_LE_STATES_SCAN_ADV_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_INIT_MASK)
 503
 504 /* Non-Connectable Adv state and Master Role combination is supported. 0x0000000000040000 */
 505 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK          0x04
 506 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF           2
 507 #define HCI_LE_STATES_NON_CONN_ADV_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_MASTER_MASK)
 508
 509 /*Scannable Adv state and Master Role combination is supported. 0x0000000000040000 */
 510 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK          0x08
 511 #define HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF           2
 512 #define HCI_LE_STATES_SCAN_ADV_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_MASTER_MASK)
 513
 514 /* Non-Connectable Adv and Slave Role combination is supported. 0x000000000100000 */
 515 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK          0x10
 516 #define HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF           2
 517 #define HCI_LE_STATES_NON_CONN_ADV_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_NON_CONN_ADV_SLAVE_MASK)
 518
 519 /*Scannable Adv and Slave Role combination is supported. 0x000000000200000 */
 520 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK          0x20
 521 #define HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF           2
 522 #define HCI_LE_STATES_SCAN_ADV_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_SCAN_ADV_SLAVE_MASK)
 523
 524 /*Passive Scan and Initiating State combination is supported. 0x000000000400000 */
 525 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK          0x40
 526 #define HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF           2
 527 #define HCI_LE_STATES_PASS_SCAN_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_INIT_MASK)
 528
 529 /*Active Scan and Initiating State combination is supported. 0x000000000800000 */
 530 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK          0x80
 531 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF           2
 532 #define HCI_LE_STATES_ACTIVE_SCAN_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_INIT_MASK)
 533
 534 /*Passive Scan and Master Role combination is supported. 0x000000001000000 */
 535 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK          0x01
 536 #define HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF           3
 537 #define HCI_LE_STATES_PASS_SCAN_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_MASTER_MASK)
 538
 539 /*Active Scan and Master Role combination is supported. 0x000000002000000 */
 540 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK          0x02
 541 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF           3
 542 #define HCI_LE_STATES_ACTIVE_SCAN_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_MASTER_MASK)
 543
 544 /*Passive Scan and Slave Role combination is supported. 0x000000004000000 */
 545 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK          0x04
 546 #define HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF           3
 547 #define HCI_LE_STATES_PASS_SCAN_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_PASS_SCAN_SLAVE_MASK)
 548
 549 /*Active Scan and Slave Role combination is supported. 0x000000008000000 */
 550 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK          0x08
 551 #define HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF           3
 552 #define HCI_LE_STATES_ACTIVE_SCAN_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_OFF] & HCI_SUPP_LE_STATES_ACTIVE_SCAN_SLAVE_MASK)
 553
 554 /*Link Layer Topology Added States Combo */
 555 /*Initiating State and Master Role combination supported.
 556   Master Role and Master Role combination is also supported. 0x0000000010000000 */
 557 #define HCI_SUPP_LE_STATES_INIT_MASTER_MASK          0x10
 558 #define HCI_SUPP_LE_STATES_INIT_MASTER_OFF           3
 559 #define HCI_LE_STATES_INIT_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_MASK)
 560
 561 /*Low Duty Cycle Directed Advertising State . 0x0000000020000000 */
 562 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASK          0x20
 563 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_OFF           3
 564 #define HCI_LE_STATES_LOW_DUTY_DIR_ADV_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_OFF] & HCI_SUPP_LE_STATES_LOW_DUTY_DIR_ADV_MASK)
 565
 566 /*Low Duty Cycle Directed Advertising State and Passive scan combination. 0x0000000040000000 */
 567 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK          0x40
 568 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF           3
 569 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_PASS_SCAN_MASK)
 570
 571 /*Low Duty Cycle Directed Advertising State and Active scan combination . 0x0000000080000000 */
 572 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK          0x80
 573 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF           3
 574 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_ACTIVE_SCAN_MASK)
 575
 576 /* Connectable Advertising State and Initiating State combination supported. 0x0000000100000000 */
 577 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK          0x01
 578 #define HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF           4
 579 #define HCI_LE_STATES_CONN_ADV_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_CONN_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_INIT_MASK)
 580
 581 /* High Duty Cycle Directed Advertising State and Initiating State combination supported. */
 582 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK          0x02
 583 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF           4
 584 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_INIT_MASK)
 585
 586 /* Low Duty Cycle Directed Advertising State and Initiating State combination supported.*/
 587 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK          0x04
 588 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF           4
 589 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_INIT_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_INIT_MASK)
 590
 591 /* Connectable Advertising State and Master Role combination supported.*/
 592 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK          0x08
 593 #define HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF           4
 594 #define HCI_LE_STATES_CONN_ADV_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_CONN_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_MASTER_MASK)
 595
 596 /* High Duty Cycle Directed Advertising State and Master Role combination supported.*/
 597 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK          0x10
 598 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF           4
 599 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_MASTER_MASK)
 600
 601 /* Low Duty Cycle Directed Advertising State and Master Role combination supported.*/
 602 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK          0x20
 603 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF           4
 604 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_MASTER_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_MASTER_MASK)
 605
 606 /* Connectable Advertising State and Slave Role combination supported. */
 607 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK          0x40
 608 #define HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF           4
 609 #define HCI_LE_STATES_CONN_ADV_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_CONN_ADV_SLAVE_MASK)
 610
 611 /* High Duty Cycle Directed Advertising State and slave Role combination supported.*/
 612 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK          0x80
 613 #define HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF           4
 614 #define HCI_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_HI_DUTY_DIR_ADV_SLAVE_MASK)
 615
 616 /* Low Duty Cycle Directed Advertising State and slave Role combination supported.*/
 617 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK          0x01
 618 #define HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF           5
 619 #define HCI_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_OFF] & HCI_SUPP_LE_STATES_LO_DUTY_DIR_ADV_SLAVE_MASK)
 620
 621 /* Initiating State and Slave Role combination supported.
 622    Master Role and Slave Role combination also supported.
 623  */
 624 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK          0x02
 625 #define HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF           5
 626 #define HCI_LE_STATES_INIT_MASTER_SLAVE_SUPPORTED(x)      ((x)[HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_OFF] & HCI_SUPP_LE_STATES_INIT_MASTER_SLAVE_MASK)
 627
 628 /*
 629 **  Definitions for HCI Events
 630 */
 631 #define HCI_INQUIRY_COMP_EVT                0x01
 632 #define HCI_INQUIRY_RESULT_EVT              0x02
 633 #define HCI_CONNECTION_COMP_EVT             0x03
 634 #define HCI_CONNECTION_REQUEST_EVT          0x04
 635 #define HCI_DISCONNECTION_COMP_EVT          0x05
 636 #define HCI_AUTHENTICATION_COMP_EVT         0x06
 637 #define HCI_RMT_NAME_REQUEST_COMP_EVT       0x07
 638 #define HCI_ENCRYPTION_CHANGE_EVT           0x08
 639 #define HCI_CHANGE_CONN_LINK_KEY_EVT        0x09
 640 #define HCI_MASTER_LINK_KEY_COMP_EVT        0x0A
 641 #define HCI_READ_RMT_FEATURES_COMP_EVT      0x0B
 642 #define HCI_READ_RMT_VERSION_COMP_EVT       0x0C
 643 #define HCI_QOS_SETUP_COMP_EVT              0x0D
 644 #define HCI_COMMAND_COMPLETE_EVT            0x0E
 645 #define HCI_COMMAND_STATUS_EVT              0x0F
 646 #define HCI_HARDWARE_ERROR_EVT              0x10
 647 #define HCI_FLUSH_OCCURED_EVT               0x11
 648 #define HCI_ROLE_CHANGE_EVT                 0x12
 649 #define HCI_NUM_COMPL_DATA_PKTS_EVT         0x13
 650 #define HCI_MODE_CHANGE_EVT                 0x14
 651 #define HCI_RETURN_LINK_KEYS_EVT            0x15
 652 #define HCI_PIN_CODE_REQUEST_EVT            0x16
 653 #define HCI_LINK_KEY_REQUEST_EVT            0x17
 654 #define HCI_LINK_KEY_NOTIFICATION_EVT       0x18
 655 #define HCI_LOOPBACK_COMMAND_EVT            0x19
 656 #define HCI_DATA_BUF_OVERFLOW_EVT           0x1A
 657 #define HCI_MAX_SLOTS_CHANGED_EVT           0x1B
 658 #define HCI_READ_CLOCK_OFF_COMP_EVT         0x1C
 659 #define HCI_CONN_PKT_TYPE_CHANGE_EVT        0x1D
 660 #define HCI_QOS_VIOLATION_EVT               0x1E
 661 #define HCI_PAGE_SCAN_MODE_CHANGE_EVT       0x1F
 662 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EVT     0x20
 663 #define HCI_FLOW_SPECIFICATION_COMP_EVT     0x21
 664 #define HCI_INQUIRY_RSSI_RESULT_EVT         0x22
 665 #define HCI_READ_RMT_EXT_FEATURES_COMP_EVT  0x23
 666 #define HCI_ESCO_CONNECTION_COMP_EVT        0x2C
 667 #define HCI_ESCO_CONNECTION_CHANGED_EVT     0x2D
 668 #define HCI_SNIFF_SUB_RATE_EVT              0x2E
 669 #define HCI_EXTENDED_INQUIRY_RESULT_EVT     0x2F
 670 #define HCI_ENCRYPTION_KEY_REFRESH_COMP_EVT 0x30
 671 #define HCI_IO_CAPABILITY_REQUEST_EVT       0x31
 672 #define HCI_IO_CAPABILITY_RESPONSE_EVT      0x32
 673 #define HCI_USER_CONFIRMATION_REQUEST_EVT   0x33
 674 #define HCI_USER_PASSKEY_REQUEST_EVT        0x34
 675 #define HCI_REMOTE_OOB_DATA_REQUEST_EVT     0x35
 676 #define HCI_SIMPLE_PAIRING_COMPLETE_EVT     0x36
 677 #define HCI_LINK_SUPER_TOUT_CHANGED_EVT     0x38
 678 #define HCI_ENHANCED_FLUSH_COMPLETE_EVT     0x39
 679 #define HCI_USER_PASSKEY_NOTIFY_EVT         0x3B
 680 #define HCI_KEYPRESS_NOTIFY_EVT             0x3C
 681 #define HCI_RMT_HOST_SUP_FEAT_NOTIFY_EVT    0x3D
 682
 683 /*#define HCI_GENERIC_AMP_LINK_KEY_NOTIF_EVT  0x3E Removed from spec */
 684 #define HCI_PHYSICAL_LINK_COMP_EVT          0x40
 685 #define HCI_CHANNEL_SELECTED_EVT            0x41
 686 #define HCI_DISC_PHYSICAL_LINK_COMP_EVT     0x42
 687 #define HCI_PHY_LINK_LOSS_EARLY_WARNING_EVT 0x43
 688 #define HCI_PHY_LINK_RECOVERY_EVT           0x44
 689 #define HCI_LOGICAL_LINK_COMP_EVT           0x45
 690 #define HCI_DISC_LOGICAL_LINK_COMP_EVT      0x46
 691 #define HCI_FLOW_SPEC_MODIFY_COMP_EVT       0x47
 692 #define HCI_NUM_COMPL_DATA_BLOCKS_EVT       0x48
 693 #define HCI_SHORT_RANGE_MODE_COMPLETE_EVT   0x4C
 694 #define HCI_AMP_STATUS_CHANGE_EVT           0x4D
 695 #define HCI_SET_TRIGGERED_CLOCK_CAPTURE_EVT 0x4E
 696
 697 /* ULP HCI Event */
 698 #define HCI_BLE_EVENT                       0x3e
 699 /* ULP Event sub code */
 700 #define HCI_BLE_CONN_COMPLETE_EVT           0x01
 701 #define HCI_BLE_ADV_PKT_RPT_EVT             0x02
 702 #define HCI_BLE_LL_CONN_PARAM_UPD_EVT       0x03
 703 #define HCI_BLE_READ_REMOTE_FEAT_CMPL_EVT   0x04
 704 #define HCI_BLE_LTK_REQ_EVT                 0x05
 705 #define HCI_BLE_RC_PARAM_REQ_EVT            0x06
 706 #define HCI_BLE_DATA_LENGTH_CHANGE_EVT      0x07
 707 #define HCI_BLE_ENHANCED_CONN_COMPLETE_EVT  0x0a
 708 #define HCI_BLE_DIRECT_ADV_EVT              0x0b
 709
 710 /* Definitions for LE Channel Map */
 711 #define HCI_BLE_CHNL_MAP_SIZE               5
 712
 713 #define HCI_VENDOR_SPECIFIC_EVT         0xFF  /* Vendor specific events */
 714 #define HCI_NAP_TRACE_EVT               0xFF  /* was define 0xFE, 0xFD, change to 0xFF
 715                                                  because conflict w/ TCI_EVT and per
 716                                                  specification compliant */
 717
 718 /*
 719 **  Defentions for HCI Error Codes that are past in the events
 720 */
 721 #define HCI_SUCCESS                                     0x00
 722 #define HCI_PENDING                                     0x00
 723 #define HCI_ERR_ILLEGAL_COMMAND                         0x01
 724 #define HCI_ERR_NO_CONNECTION                           0x02
 725 #define HCI_ERR_HW_FAILURE                              0x03
 726 #define HCI_ERR_PAGE_TIMEOUT                            0x04
 727 #define HCI_ERR_AUTH_FAILURE                            0x05
 728 #define HCI_ERR_KEY_MISSING                             0x06
 729 #define HCI_ERR_MEMORY_FULL                             0x07
 730 #define HCI_ERR_CONNECTION_TOUT                         0x08
 731 #define HCI_ERR_MAX_NUM_OF_CONNECTIONS                  0x09
 732 #define HCI_ERR_MAX_NUM_OF_SCOS                         0x0A
 733 #define HCI_ERR_CONNECTION_EXISTS                       0x0B
 734 #define HCI_ERR_COMMAND_DISALLOWED                      0x0C
 735 #define HCI_ERR_HOST_REJECT_RESOURCES                   0x0D
 736 #define HCI_ERR_HOST_REJECT_SECURITY                    0x0E
 737 #define HCI_ERR_HOST_REJECT_DEVICE                      0x0F
 738 #define HCI_ERR_HOST_TIMEOUT                            0x10
 739 #define HCI_ERR_UNSUPPORTED_VALUE                       0x11
 740 #define HCI_ERR_ILLEGAL_PARAMETER_FMT                   0x12
 741 #define HCI_ERR_PEER_USER                               0x13
 742 #define HCI_ERR_PEER_LOW_RESOURCES                      0x14
 743 #define HCI_ERR_PEER_POWER_OFF                          0x15
 744 #define HCI_ERR_CONN_CAUSE_LOCAL_HOST                   0x16
 745 #define HCI_ERR_REPEATED_ATTEMPTS                       0x17
 746 #define HCI_ERR_PAIRING_NOT_ALLOWED                     0x18
 747 #define HCI_ERR_UNKNOWN_LMP_PDU                         0x19
 748 #define HCI_ERR_UNSUPPORTED_REM_FEATURE                 0x1A
 749 #define HCI_ERR_SCO_OFFSET_REJECTED                     0x1B
 750 #define HCI_ERR_SCO_INTERVAL_REJECTED                   0x1C
 751 #define HCI_ERR_SCO_AIR_MODE                            0x1D
 752 #define HCI_ERR_INVALID_LMP_PARAM                       0x1E
 753 #define HCI_ERR_UNSPECIFIED                             0x1F
 754 #define HCI_ERR_UNSUPPORTED_LMP_FEATURE                 0x20
 755 #define HCI_ERR_ROLE_CHANGE_NOT_ALLOWED                 0x21
 756 #define HCI_ERR_LMP_RESPONSE_TIMEOUT                    0x22
 757 #define HCI_ERR_LMP_ERR_TRANS_COLLISION                 0x23
 758 #define HCI_ERR_LMP_PDU_NOT_ALLOWED                     0x24
 759 #define HCI_ERR_ENCRY_MODE_NOT_ACCEPTABLE               0x25
 760 #define HCI_ERR_UNIT_KEY_USED                           0x26
 761 #define HCI_ERR_QOS_NOT_SUPPORTED                       0x27
 762 #define HCI_ERR_INSTANT_PASSED                          0x28
 763 #define HCI_ERR_PAIRING_WITH_UNIT_KEY_NOT_SUPPORTED     0x29
 764 #define HCI_ERR_DIFF_TRANSACTION_COLLISION              0x2A
 765 #define HCI_ERR_UNDEFINED_0x2B                          0x2B
 766 #define HCI_ERR_QOS_UNACCEPTABLE_PARAM                  0x2C
 767 #define HCI_ERR_QOS_REJECTED                            0x2D
 768 #define HCI_ERR_CHAN_CLASSIF_NOT_SUPPORTED              0x2E
 769 #define HCI_ERR_INSUFFCIENT_SECURITY                    0x2F
 770 #define HCI_ERR_PARAM_OUT_OF_RANGE                      0x30
 771 #define HCI_ERR_UNDEFINED_0x31                          0x31
 772 #define HCI_ERR_ROLE_SWITCH_PENDING                     0x32
 773 #define HCI_ERR_UNDEFINED_0x33                          0x33
 774 #define HCI_ERR_RESERVED_SLOT_VIOLATION                 0x34
 775 #define HCI_ERR_ROLE_SWITCH_FAILED                      0x35
 776 #define HCI_ERR_INQ_RSP_DATA_TOO_LARGE                  0x36
 777 #define HCI_ERR_SIMPLE_PAIRING_NOT_SUPPORTED            0x37
 778 #define HCI_ERR_HOST_BUSY_PAIRING                       0x38
 779 #define HCI_ERR_REJ_NO_SUITABLE_CHANNEL                 0x39
 780 #define HCI_ERR_CONTROLLER_BUSY                         0x3A
 781 #define HCI_ERR_UNACCEPT_CONN_INTERVAL                  0x3B
 782 #define HCI_ERR_DIRECTED_ADVERTISING_TIMEOUT            0x3C
 783 #define HCI_ERR_CONN_TOUT_DUE_TO_MIC_FAILURE            0x3D
 784 #define HCI_ERR_CONN_FAILED_ESTABLISHMENT               0x3E
 785 #define HCI_ERR_MAC_CONNECTION_FAILED                   0x3F
 786
 787 /* ConnectionLess Broadcast errors */
 788 #define HCI_ERR_LT_ADDR_ALREADY_IN_USE                  0x40
 789 #define HCI_ERR_LT_ADDR_NOT_ALLOCATED                   0x41
 790 #define HCI_ERR_CLB_NOT_ENABLED                         0x42
 791 #define HCI_ERR_CLB_DATA_TOO_BIG                        0x43
 792
 793 #define HCI_ERR_MAX_ERR                                 0x43
 794
 795 //ESP vendor error code
 796 #define HCI_ERR_ESP_VENDOR_FAIL                         0xE0
 797
 798 #define HCI_HINT_TO_RECREATE_AMP_PHYS_LINK              0xFF
 799
 800 /*
 801 ** Definitions for HCI enable event
 802 */
 803 #define HCI_INQUIRY_COMPLETE_EV(p)          (*((UINT32 *)(p)) & 0x00000001)
 804 #define HCI_INQUIRY_RESULT_EV(p)            (*((UINT32 *)(p)) & 0x00000002)
 805 #define HCI_CONNECTION_COMPLETE_EV(p)       (*((UINT32 *)(p)) & 0x00000004)
 806 #define HCI_CONNECTION_REQUEST_EV(p)        (*((UINT32 *)(p)) & 0x00000008)
 807 #define HCI_DISCONNECTION_COMPLETE_EV(p)    (*((UINT32 *)(p)) & 0x00000010)
 808 #define HCI_AUTHENTICATION_COMPLETE_EV(p)   (*((UINT32 *)(p)) & 0x00000020)
 809 #define HCI_RMT_NAME_REQUEST_COMPL_EV(p)    (*((UINT32 *)(p)) & 0x00000040)
 810 #define HCI_CHANGE_CONN_ENCRPT_ENABLE_EV(p) (*((UINT32 *)(p)) & 0x00000080)
 811 #define HCI_CHANGE_CONN_LINK_KEY_EV(p)      (*((UINT32 *)(p)) & 0x00000100)
 812 #define HCI_MASTER_LINK_KEY_COMPLETE_EV(p)  (*((UINT32 *)(p)) & 0x00000200)
 813 #define HCI_READ_RMT_FEATURES_COMPL_EV(p)   (*((UINT32 *)(p)) & 0x00000400)
 814 #define HCI_READ_RMT_VERSION_COMPL_EV(p)    (*((UINT32 *)(p)) & 0x00000800)
 815 #define HCI_QOS_SETUP_COMPLETE_EV(p)        (*((UINT32 *)(p)) & 0x00001000)
 816 #define HCI_COMMAND_COMPLETE_EV(p)          (*((UINT32 *)(p)) & 0x00002000)
 817 #define HCI_COMMAND_STATUS_EV(p)            (*((UINT32 *)(p)) & 0x00004000)
 818 #define HCI_HARDWARE_ERROR_EV(p)            (*((UINT32 *)(p)) & 0x00008000)
 819 #define HCI_FLASH_OCCURED_EV(p)             (*((UINT32 *)(p)) & 0x00010000)
 820 #define HCI_ROLE_CHANGE_EV(p)               (*((UINT32 *)(p)) & 0x00020000)
 821 #define HCI_NUM_COMPLETED_PKTS_EV(p)        (*((UINT32 *)(p)) & 0x00040000)
 822 #define HCI_MODE_CHANGE_EV(p)               (*((UINT32 *)(p)) & 0x00080000)
 823 #define HCI_RETURN_LINK_KEYS_EV(p)          (*((UINT32 *)(p)) & 0x00100000)
 824 #define HCI_PIN_CODE_REQUEST_EV(p)          (*((UINT32 *)(p)) & 0x00200000)
 825 #define HCI_LINK_KEY_REQUEST_EV(p)          (*((UINT32 *)(p)) & 0x00400000)
 826 #define HCI_LINK_KEY_NOTIFICATION_EV(p)     (*((UINT32 *)(p)) & 0x00800000)
 827 #define HCI_LOOPBACK_COMMAND_EV(p)          (*((UINT32 *)(p)) & 0x01000000)
 828 #define HCI_DATA_BUF_OVERFLOW_EV(p)         (*((UINT32 *)(p)) & 0x02000000)
 829 #define HCI_MAX_SLOTS_CHANGE_EV(p)          (*((UINT32 *)(p)) & 0x04000000)
 830 #define HCI_READ_CLOCK_OFFSET_COMP_EV(p)    (*((UINT32 *)(p)) & 0x08000000)
 831 #define HCI_CONN_PKT_TYPE_CHANGED_EV(p)     (*((UINT32 *)(p)) & 0x10000000)
 832 #define HCI_QOS_VIOLATION_EV(p)             (*((UINT32 *)(p)) & 0x20000000)
 833 #define HCI_PAGE_SCAN_MODE_CHANGED_EV(p)    (*((UINT32 *)(p)) & 0x40000000)
 834 #define HCI_PAGE_SCAN_REP_MODE_CHNG_EV(p)   (*((UINT32 *)(p)) & 0x80000000)
 835
 836 /* the default event mask for 2.1+EDR (Lisbon) does not include Lisbon events */
 837 #define HCI_DEFAULT_EVENT_MASK_0            0xFFFFFFFF
 838 #define HCI_DEFAULT_EVENT_MASK_1            0x00001FFF
 839
 840 /* the event mask for 2.0 + EDR and later (includes Lisbon events) */
 841 #define HCI_LISBON_EVENT_MASK_0             0xFFFFFFFF
 842 #define HCI_LISBON_EVENT_MASK_1             0x1DBFFFFF
 843 #define HCI_LISBON_EVENT_MASK               "\x0D\xBF\xFF\xFF\xFF\xFF\xFF\xFF"
 844 #define HCI_LISBON_EVENT_MASK_EXT           "\x1D\xBF\xFF\xFF\xFF\xFF\xFF\xFF"
 845 #define HCI_DUMO_EVENT_MASK_EXT             "\x3D\xBF\xFF\xFF\xFF\xFF\xFF\xFF"
 846 /*  0x00001FFF FFFFFFFF Default - no Lisbon events
 847     0x00000800 00000000 Synchronous Connection Complete Event
 848     0x00001000 00000000 Synchronous Connection Changed Event
 849     0x00002000 00000000 Sniff Subrate Event
 850     0x00004000 00000000 Extended Inquiry Result Event
 851     0x00008000 00000000 Encryption Key Refresh Complete Event
 852     0x00010000 00000000 IO Capability Request Event
 853     0x00020000 00000000 IO Capability Response Event
 854     0x00040000 00000000 User Confirmation Request Event
 855     0x00080000 00000000 User Passkey Request Event
 856     0x00100000 00000000 Remote OOB Data Request Event
 857     0x00200000 00000000 Simple Pairing Complete Event
 858     0x00400000 00000000 Generic AMP Link Key Notification Event
 859     0x00800000 00000000 Link Supervision Timeout Changed Event
 860     0x01000000 00000000 Enhanced Flush Complete Event
 861     0x04000000 00000000 User Passkey Notification Event
 862     0x08000000 00000000 Keypress Notification Event
 863     0x10000000 00000000 Remote Host Supported Features Notification Event
 864     0x20000000 00000000 LE Meta Event
 865  */
 866
 867
 868 /* the event mask for AMP controllers */
 869 #define HCI_AMP_EVENT_MASK_3_0               "\x00\x00\x00\x00\x00\x00\x3F\xFF"
 870
 871 /*  0x0000000000000000 No events specified (default)
 872     0x0000000000000001 Physical Link Complete Event
 873     0x0000000000000002 Channel Selected Event
 874     0x0000000000000004 Disconnection Physical Link Event
 875     0x0000000000000008 Physical Link Loss Early Warning Event
 876     0x0000000000000010 Physical Link Recovery Event
 877     0x0000000000000020 Logical Link Complete Event
 878     0x0000000000000040 Disconnection Logical Link Complete Event
 879     0x0000000000000080 Flow Spec Modify Complete Event
 880     0x0000000000000100 Number of Completed Data Blocks Event
 881     0x0000000000000200 AMP Start Test Event
 882     0x0000000000000400 AMP Test End Event
 883     0x0000000000000800 AMP Receiver Report Event
 884     0x0000000000001000 Short Range Mode Change Complete Event
 885     0x0000000000002000 AMP Status Change Event
 886 */
 887
 888 /* the event mask page 2 (CLB + CSA4) for BR/EDR controller */
 889 #define HCI_PAGE_2_EVENT_MASK                  "\x00\x00\x00\x00\x00\x7F\xC0\x00"
 890 /*  0x0000000000004000 Triggered Clock Capture Event
 891     0x0000000000008000 Sync Train Complete Event
 892     0x0000000000010000 Sync Train Received Event
 893     0x0000000000020000 Connectionless Broadcast Receive Event
 894     0x0000000000040000 Connectionless Broadcast Timeout Event
 895     0x0000000000080000 Truncated Page Complete Event
 896     0x0000000000100000 Salve Page Response Timeout Event
 897     0x0000000000200000 Connectionless Broadcast Channel Map Change Event
 898     0x0000000000400000 Inquiry Response Notification Event
 899 */
 900 #if BLE_PRIVACY_SPT == TRUE
 901 /* BLE event mask */
 902 #define HCI_BLE_EVENT_MASK_DEF               "\x00\x00\x00\x00\x00\x00\x07\xff"
 903 #else
 904 #define HCI_BLE_EVENT_MASK_DEF              "\x00\x00\x00\x00\x00\x00\x00\x7f"
 905 #endif
 906 /*
 907 ** Definitions for packet type masks (BT1.2 and BT2.0 definitions)
 908 */
 909 #define HCI_PKT_TYPES_MASK_NO_2_DH1         0x0002
 910 #define HCI_PKT_TYPES_MASK_NO_3_DH1         0x0004
 911 #define HCI_PKT_TYPES_MASK_DM1              0x0008
 912 #define HCI_PKT_TYPES_MASK_DH1              0x0010
 913 #define HCI_PKT_TYPES_MASK_HV1              0x0020
 914 #define HCI_PKT_TYPES_MASK_HV2              0x0040
 915 #define HCI_PKT_TYPES_MASK_HV3              0x0080
 916 #define HCI_PKT_TYPES_MASK_NO_2_DH3         0x0100
 917 #define HCI_PKT_TYPES_MASK_NO_3_DH3         0x0200
 918 #define HCI_PKT_TYPES_MASK_DM3              0x0400
 919 #define HCI_PKT_TYPES_MASK_DH3              0x0800
 920 #define HCI_PKT_TYPES_MASK_NO_2_DH5         0x1000
 921 #define HCI_PKT_TYPES_MASK_NO_3_DH5         0x2000
 922 #define HCI_PKT_TYPES_MASK_DM5              0x4000
 923 #define HCI_PKT_TYPES_MASK_DH5              0x8000
 924
 925 /* Packet type should be one of valid but at least one should be specified */
 926 #define HCI_VALID_SCO_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_HV1       \
 927                                            |  HCI_PKT_TYPES_MASK_HV2       \
 928                                            |  HCI_PKT_TYPES_MASK_HV3)) == 0)) \
 929                                     && ((t) != 0))
 930
 931
 932
 933
 934
 935 /* Packet type should not be invalid and at least one should be specified */
 936 #define HCI_VALID_ACL_PKT_TYPE(t) (((((t) & ~(HCI_PKT_TYPES_MASK_DM1        \
 937                                            |  HCI_PKT_TYPES_MASK_DH1        \
 938                                            |  HCI_PKT_TYPES_MASK_DM3        \
 939                                            |  HCI_PKT_TYPES_MASK_DH3        \
 940                                            |  HCI_PKT_TYPES_MASK_DM5        \
 941                                            |  HCI_PKT_TYPES_MASK_DH5        \
 942                                            |  HCI_PKT_TYPES_MASK_NO_2_DH1   \
 943                                            |  HCI_PKT_TYPES_MASK_NO_3_DH1   \
 944                                            |  HCI_PKT_TYPES_MASK_NO_2_DH3   \
 945                                            |  HCI_PKT_TYPES_MASK_NO_3_DH3   \
 946                                            |  HCI_PKT_TYPES_MASK_NO_2_DH5   \
 947                                            |  HCI_PKT_TYPES_MASK_NO_3_DH5  )) == 0)) \
 948                                     && (((t) &  (HCI_PKT_TYPES_MASK_DM1        \
 949                                               |  HCI_PKT_TYPES_MASK_DH1        \
 950                                               |  HCI_PKT_TYPES_MASK_DM3        \
 951                                               |  HCI_PKT_TYPES_MASK_DH3        \
 952                                               |  HCI_PKT_TYPES_MASK_DM5        \
 953                                               |  HCI_PKT_TYPES_MASK_DH5)) != 0))
 954
 955 /*
 956 ** Definitions for eSCO packet type masks (BT1.2 and BT2.0 definitions)
 957 */
 958 #define HCI_ESCO_PKT_TYPES_MASK_HV1         0x0001
 959 #define HCI_ESCO_PKT_TYPES_MASK_HV2         0x0002
 960 #define HCI_ESCO_PKT_TYPES_MASK_HV3         0x0004
 961 #define HCI_ESCO_PKT_TYPES_MASK_EV3         0x0008
 962 #define HCI_ESCO_PKT_TYPES_MASK_EV4         0x0010
 963 #define HCI_ESCO_PKT_TYPES_MASK_EV5         0x0020
 964 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV3    0x0040
 965 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV3    0x0080
 966 #define HCI_ESCO_PKT_TYPES_MASK_NO_2_EV5    0x0100
 967 #define HCI_ESCO_PKT_TYPES_MASK_NO_3_EV5    0x0200
 968
 969 /* Packet type should be one of valid but at least one should be specified for 1.2 */
 970 #define HCI_VALID_ESCO_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_EV3       \
 971                                            |   HCI_ESCO_PKT_TYPES_MASK_EV4       \
 972                                            |   HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \
 973                                     && ((t) != 0))/* Packet type should be one of valid but at least one should be specified */
 974
 975 #define HCI_VALID_ESCO_SCOPKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1       \
 976                                            |      HCI_ESCO_PKT_TYPES_MASK_HV2       \
 977                                            |      HCI_ESCO_PKT_TYPES_MASK_HV3)) == 0)) \
 978                                     && ((t) != 0))
 979
 980 #define HCI_VALID_SCO_ALL_PKT_TYPE(t) (((((t) & ~(HCI_ESCO_PKT_TYPES_MASK_HV1       \
 981                                            |      HCI_ESCO_PKT_TYPES_MASK_HV2       \
 982                                            |      HCI_ESCO_PKT_TYPES_MASK_HV3       \
 983                                            |      HCI_ESCO_PKT_TYPES_MASK_EV3       \
 984                                            |      HCI_ESCO_PKT_TYPES_MASK_EV4       \
 985                                            |      HCI_ESCO_PKT_TYPES_MASK_EV5)) == 0)) \
 986                                     && ((t) != 0))
 987
 988 /*
 989 ** Define parameters to allow role switch during create connection
 990 */
 991 #define HCI_CR_CONN_NOT_ALLOW_SWITCH    0x00
 992 #define HCI_CR_CONN_ALLOW_SWITCH        0x01
 993
 994 /*
 995 ** Hold Mode command destination
 996 */
 997 #define HOLD_MODE_DEST_LOCAL_DEVICE     0x00
 998 #define HOLD_MODE_DEST_RMT_DEVICE       0x01
 999
1000 /*
1001 **  Definitions for different HCI parameters
1002 */
1003 #define HCI_PER_INQ_MIN_MAX_PERIOD      0x0003
1004 #define HCI_PER_INQ_MAX_MAX_PERIOD      0xFFFF
1005 #define HCI_PER_INQ_MIN_MIN_PERIOD      0x0002
1006 #define HCI_PER_INQ_MAX_MIN_PERIOD      0xFFFE
1007
1008 #define HCI_MAX_INQUIRY_LENGTH          0x30
1009
1010 #define HCI_MIN_INQ_LAP                 0x9E8B00
1011 #define HCI_MAX_INQ_LAP                 0x9E8B3F
1012
1013 /* HCI role defenitions */
1014 #define HCI_ROLE_MASTER                 0x00
1015 #define HCI_ROLE_SLAVE                  0x01
1016 #define HCI_ROLE_UNKNOWN                0xff
1017
1018 /* HCI mode defenitions */
1019 #define HCI_MODE_ACTIVE                 0x00
1020 #define HCI_MODE_HOLD                   0x01
1021 #define HCI_MODE_SNIFF                  0x02
1022 #define HCI_MODE_PARK                   0x03
1023
1024 /* HCI Flow Control Mode defenitions */
1025 #define HCI_PACKET_BASED_FC_MODE        0x00
1026 #define HCI_BLOCK_BASED_FC_MODE         0x01
1027
1028 /* Define Packet types as requested by the Host */
1029 #define HCI_ACL_PKT_TYPE_NONE           0x0000
1030 #define HCI_ACL_PKT_TYPE_DM1            0x0008
1031 #define HCI_ACL_PKT_TYPE_DH1            0x0010
1032 #define HCI_ACL_PKT_TYPE_AUX1           0x0200
1033 #define HCI_ACL_PKT_TYPE_DM3            0x0400
1034 #define HCI_ACL_PKT_TYPE_DH3            0x0800
1035 #define HCI_ACL_PKT_TYPE_DM5            0x4000
1036 #define HCI_ACL_PKT_TYPE_DH5            0x8000
1037
1038 /* Define key type in the Master Link Key command */
1039 #define HCI_USE_SEMI_PERMANENT_KEY      0x00
1040 #define HCI_USE_TEMPORARY_KEY           0x01
1041
1042 /* Page scan period modes */
1043 #define HCI_PAGE_SCAN_REP_MODE_R0       0x00
1044 #define HCI_PAGE_SCAN_REP_MODE_R1       0x01
1045 #define HCI_PAGE_SCAN_REP_MODE_R2       0x02
1046
1047 /* Define limits for page scan repetition modes */
1048 #define HCI_PAGE_SCAN_R1_LIMIT          0x0800
1049 #define HCI_PAGE_SCAN_R2_LIMIT          0x1000
1050
1051 /* Page scan period modes */
1052 #define HCI_PAGE_SCAN_PER_MODE_P0       0x00
1053 #define HCI_PAGE_SCAN_PER_MODE_P1       0x01
1054 #define HCI_PAGE_SCAN_PER_MODE_P2       0x02
1055
1056 /* Page scan modes */
1057 #define HCI_MANDATARY_PAGE_SCAN_MODE    0x00
1058 #define HCI_OPTIONAL_PAGE_SCAN_MODE1    0x01
1059 #define HCI_OPTIONAL_PAGE_SCAN_MODE2    0x02
1060 #define HCI_OPTIONAL_PAGE_SCAN_MODE3    0x03
1061
1062 /* Page and inquiry scan types */
1063 #define HCI_SCAN_TYPE_STANDARD          0x00
1064 #define HCI_SCAN_TYPE_INTERLACED        0x01       /* 1.2 devices or later */
1065 #define HCI_DEF_SCAN_TYPE               HCI_SCAN_TYPE_STANDARD
1066
1067 /* Definitions for quality of service service types */
1068 #define HCI_SERVICE_NO_TRAFFIC          0x00
1069 #define HCI_SERVICE_BEST_EFFORT         0x01
1070 #define HCI_SERVICE_GUARANTEED          0x02
1071
1072 #define HCI_QOS_LATENCY_DO_NOT_CARE     0xFFFFFFFF
1073 #define HCI_QOS_DELAY_DO_NOT_CARE       0xFFFFFFFF
1074
1075 /* Definitions for Flow Specification */
1076 #define HCI_FLOW_SPEC_LATENCY_DO_NOT_CARE 0xFFFFFFFF
1077
1078 /* Definitions for AFH Channel Map */
1079 #define HCI_AFH_CHANNEL_MAP_LEN         10
1080
1081 /* Definitions for Extended Inquiry Response */
1082 #define HCI_EXT_INQ_RESPONSE_LEN        240
1083 #define HCI_EIR_FLAGS_TYPE                   BT_EIR_FLAGS_TYPE
1084 #define HCI_EIR_MORE_16BITS_UUID_TYPE        BT_EIR_MORE_16BITS_UUID_TYPE
1085 #define HCI_EIR_COMPLETE_16BITS_UUID_TYPE    BT_EIR_COMPLETE_16BITS_UUID_TYPE
1086 #define HCI_EIR_MORE_32BITS_UUID_TYPE        BT_EIR_MORE_32BITS_UUID_TYPE
1087 #define HCI_EIR_COMPLETE_32BITS_UUID_TYPE    BT_EIR_COMPLETE_32BITS_UUID_TYPE
1088 #define HCI_EIR_MORE_128BITS_UUID_TYPE       BT_EIR_MORE_128BITS_UUID_TYPE
1089 #define HCI_EIR_COMPLETE_128BITS_UUID_TYPE   BT_EIR_COMPLETE_128BITS_UUID_TYPE
1090 #define HCI_EIR_SHORTENED_LOCAL_NAME_TYPE    BT_EIR_SHORTENED_LOCAL_NAME_TYPE
1091 #define HCI_EIR_COMPLETE_LOCAL_NAME_TYPE     BT_EIR_COMPLETE_LOCAL_NAME_TYPE
1092 #define HCI_EIR_TX_POWER_LEVEL_TYPE          BT_EIR_TX_POWER_LEVEL_TYPE
1093 #define HCI_EIR_MANUFACTURER_SPECIFIC_TYPE   BT_EIR_MANUFACTURER_SPECIFIC_TYPE
1094 #define HCI_EIR_OOB_BD_ADDR_TYPE             BT_EIR_OOB_BD_ADDR_TYPE
1095 #define HCI_EIR_OOB_COD_TYPE                 BT_EIR_OOB_COD_TYPE
1096 #define HCI_EIR_OOB_SSP_HASH_C_TYPE          BT_EIR_OOB_SSP_HASH_C_TYPE
1097 #define HCI_EIR_OOB_SSP_RAND_R_TYPE          BT_EIR_OOB_SSP_RAND_R_TYPE
1098
1099 /* Definitions for Write Simple Pairing Mode */
1100 #define HCI_SP_MODE_UNDEFINED           0x00
1101 #define HCI_SP_MODE_ENABLED             0x01
1102
1103 /* Definitions for Write Simple Pairing Debug Mode */
1104 #define HCI_SPD_MODE_DISABLED           0x00
1105 #define HCI_SPD_MODE_ENABLED            0x01
1106
1107 /* Definitions for Write Secure Connections Host Support */
1108 #define HCI_SC_MODE_DISABLED            0x00
1109 #define HCI_SC_MODE_ENABLED             0x01
1110
1111 /* Definitions for IO Capability Response/Command */
1112 #define HCI_IO_CAP_DISPLAY_ONLY         0x00
1113 #define HCI_IO_CAP_DISPLAY_YESNO        0x01
1114 #define HCI_IO_CAP_KEYBOARD_ONLY        0x02
1115 #define HCI_IO_CAP_NO_IO                0x03
1116
1117 #define HCI_OOB_AUTH_DATA_NOT_PRESENT   0x00
1118 #define HCI_OOB_REM_AUTH_DATA_PRESENT   0x01
1119
1120 #define HCI_MITM_PROTECT_NOT_REQUIRED  0x00
1121 #define HCI_MITM_PROTECT_REQUIRED      0x01
1122
1123
1124 /* Policy settings status */
1125 #define HCI_DISABLE_ALL_LM_MODES        0x0000
1126 #define HCI_ENABLE_MASTER_SLAVE_SWITCH  0x0001
1127 #define HCI_ENABLE_HOLD_MODE            0x0002
1128 #define HCI_ENABLE_SNIFF_MODE           0x0004
1129 #define HCI_ENABLE_PARK_MODE            0x0008
1130
1131 /* By default allow switch, because host can not allow that */
1132 /* that until he created the connection */
1133 #define HCI_DEFAULT_POLICY_SETTINGS     HCI_DISABLE_ALL_LM_MODES
1134
1135 /* Filters that are sent in set filter command */
1136 #define HCI_FILTER_TYPE_CLEAR_ALL       0x00
1137 #define HCI_FILTER_INQUIRY_RESULT       0x01
1138 #define HCI_FILTER_CONNECTION_SETUP     0x02
1139
1140 #define HCI_FILTER_COND_NEW_DEVICE      0x00
1141 #define HCI_FILTER_COND_DEVICE_CLASS    0x01
1142 #define HCI_FILTER_COND_BD_ADDR         0x02
1143
1144 #define HCI_DO_NOT_AUTO_ACCEPT_CONNECT  1
1145 #define HCI_DO_AUTO_ACCEPT_CONNECT      2   /* role switch disabled */
1146 #define HCI_DO_AUTO_ACCEPT_CONNECT_RS   3   /* role switch enabled (1.1 errata 1115) */
1147
1148 /* Auto accept flags */
1149 #define HCI_AUTO_ACCEPT_OFF             0x00
1150 #define HCI_AUTO_ACCEPT_ACL_CONNECTIONS 0x01
1151 #define HCI_AUTO_ACCEPT_SCO_CONNECTIONS 0x02
1152
1153 /* PIN type */
1154 #define HCI_PIN_TYPE_VARIABLE           0
1155 #define HCI_PIN_TYPE_FIXED              1
1156
1157 /* Loopback Modes */
1158 #define HCI_LOOPBACK_MODE_DISABLED      0
1159 #define HCI_LOOPBACK_MODE_LOCAL         1
1160 #define HCI_LOOPBACK_MODE_REMOTE        2
1161
1162 #define SLOTS_PER_10MS                  16      /* 0.625 ms slots in a 10 ms tick */
1163
1164 /* Maximum connection accept timeout in 0.625msec */
1165 #define HCI_MAX_CONN_ACCEPT_TOUT        0xB540  /* 29 sec */
1166 #define HCI_DEF_CONN_ACCEPT_TOUT        0x1F40  /* 5 sec */
1167
1168 /* Page timeout is used in LC only and LC is counting down slots not using OS */
1169 #define HCI_DEFAULT_PAGE_TOUT           0x2000  /* 5.12 sec (in slots) */
1170
1171 /* Scan enable flags */
1172 #define HCI_NO_SCAN_ENABLED             0x00
1173 #define HCI_INQUIRY_SCAN_ENABLED        0x01
1174 #define HCI_PAGE_SCAN_ENABLED           0x02
1175
1176 /* Pagescan timer definitions in 0.625 ms */
1177 #define HCI_MIN_PAGESCAN_INTERVAL       0x12    /* 11.25 ms */
1178 #define HCI_MAX_PAGESCAN_INTERVAL       0x1000  /* 2.56 sec */
1179 #define HCI_DEF_PAGESCAN_INTERVAL       0x0800  /* 1.28 sec */
1180
1181 /* Parameter for pagescan window is passed to LC and is kept in slots */
1182 #define HCI_MIN_PAGESCAN_WINDOW         0x11    /* 10.625 ms */
1183 #define HCI_MAX_PAGESCAN_WINDOW         0x1000  /* 2.56  sec */
1184 #define HCI_DEF_PAGESCAN_WINDOW         0x12    /* 11.25 ms  */
1185
1186 /* Inquiryscan timer definitions in 0.625 ms */
1187 #define HCI_MIN_INQUIRYSCAN_INTERVAL    0x12    /* 11.25 ms */
1188 #define HCI_MAX_INQUIRYSCAN_INTERVAL    0x1000  /* 2.56 sec */
1189 #define HCI_DEF_INQUIRYSCAN_INTERVAL    0x1000  /* 2.56 sec */
1190
1191 /* Parameter for inquiryscan window is passed to LC and is kept in slots */
1192 #define HCI_MIN_INQUIRYSCAN_WINDOW      0x11    /* 10.625 ms */
1193 #define HCI_MAX_INQUIRYSCAN_WINDOW      0x1000  /* 2.56 sec */
1194 #define HCI_DEF_INQUIRYSCAN_WINDOW      0x12    /* 11.25 ms */
1195
1196 /* Encryption modes */
1197 #define HCI_ENCRYPT_MODE_DISABLED       0x00
1198 #define HCI_ENCRYPT_MODE_POINT_TO_POINT 0x01
1199 #define HCI_ENCRYPT_MODE_ALL            0x02
1200
1201 /* Voice settings */
1202 #define HCI_INP_CODING_LINEAR           0x0000 /* 0000000000 */
1203 #define HCI_INP_CODING_U_LAW            0x0100 /* 0100000000 */
1204 #define HCI_INP_CODING_A_LAW            0x0200 /* 1000000000 */
1205 #define HCI_INP_CODING_MASK             0x0300 /* 1100000000 */
1206
1207 #define HCI_INP_DATA_FMT_1S_COMPLEMENT  0x0000 /* 0000000000 */
1208 #define HCI_INP_DATA_FMT_2S_COMPLEMENT  0x0040 /* 0001000000 */
1209 #define HCI_INP_DATA_FMT_SIGN_MAGNITUDE 0x0080 /* 0010000000 */
1210 #define HCI_INP_DATA_FMT_UNSIGNED       0x00c0 /* 0011000000 */
1211 #define HCI_INP_DATA_FMT_MASK           0x00c0 /* 0011000000 */
1212
1213 #define HCI_INP_SAMPLE_SIZE_8BIT        0x0000 /* 0000000000 */
1214 #define HCI_INP_SAMPLE_SIZE_16BIT       0x0020 /* 0000100000 */
1215 #define HCI_INP_SAMPLE_SIZE_MASK        0x0020 /* 0000100000 */
1216
1217 #define HCI_INP_LINEAR_PCM_BIT_POS_MASK 0x001c /* 0000011100 */
1218 #define HCI_INP_LINEAR_PCM_BIT_POS_OFFS 2
1219
1220 #define HCI_AIR_CODING_FORMAT_CVSD      0x0000 /* 0000000000 */
1221 #define HCI_AIR_CODING_FORMAT_U_LAW     0x0001 /* 0000000001 */
1222 #define HCI_AIR_CODING_FORMAT_A_LAW     0x0002 /* 0000000010 */
1223 #define HCI_AIR_CODING_FORMAT_TRANSPNT  0x0003 /* 0000000011 */
1224 #define HCI_AIR_CODING_FORMAT_MASK      0x0003 /* 0000000011 */
1225
1226 /* default                                        0001100000 */
1227 #define HCI_DEFAULT_VOICE_SETTINGS    (HCI_INP_CODING_LINEAR \
1228                                      | HCI_INP_DATA_FMT_2S_COMPLEMENT \
1229                                      | HCI_INP_SAMPLE_SIZE_16BIT \
1230                                      | HCI_AIR_CODING_FORMAT_CVSD)
1231
1232 #define HCI_CVSD_SUPPORTED(x)       (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_CVSD)
1233 #define HCI_U_LAW_SUPPORTED(x)      (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_U_LAW)
1234 #define HCI_A_LAW_SUPPORTED(x)      (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_A_LAW)
1235 #define HCI_TRANSPNT_SUPPORTED(x)   (((x) & HCI_AIR_CODING_FORMAT_MASK) == HCI_AIR_CODING_FORMAT_TRANSPNT)
1236
1237 /* Retransmit timer definitions in 0.625 */
1238 #define HCI_MAX_AUTO_FLUSH_TOUT         0x07FF
1239 #define HCI_DEFAULT_AUTO_FLUSH_TOUT     0       /* No auto flush */
1240
1241 /* Broadcast retransmitions */
1242 #define HCI_DEFAULT_NUM_BCAST_RETRAN    1
1243
1244 /* Define broadcast data types as passed in the hci data packet */
1245 #define HCI_DATA_POINT_TO_POINT         0x00
1246 #define HCI_DATA_ACTIVE_BCAST           0x01
1247 #define HCI_DATA_PICONET_BCAST          0x02
1248
1249 /* Hold mode activity */
1250 #define HCI_MAINTAIN_CUR_POWER_STATE    0x00
1251 #define HCI_SUSPEND_PAGE_SCAN           0x01
1252 #define HCI_SUSPEND_INQUIRY_SCAN        0x02
1253 #define HCI_SUSPEND_PERIODIC_INQUIRIES  0x04
1254
1255 /* Default Link Supervision timeoout */
1256 #define HCI_DEFAULT_INACT_TOUT          0x7D00  /* BR/EDR (20 seconds) */
1257 #define HCI_DEFAULT_AMP_INACT_TOUT      0x3E80  /* AMP    (10 seconds) */
1258
1259 /* Read transmit power level parameter */
1260 #define HCI_READ_CURRENT                0x00
1261 #define HCI_READ_MAXIMUM                0x01
1262
1263 /* Link types for connection complete event */
1264 #define HCI_LINK_TYPE_SCO               0x00
1265 #define HCI_LINK_TYPE_ACL               0x01
1266 #define HCI_LINK_TYPE_ESCO              0x02
1267
1268 /* Link Key Notification Event (Key Type) definitions */
1269 #define HCI_LKEY_TYPE_COMBINATION       0x00
1270 #define HCI_LKEY_TYPE_LOCAL_UNIT        0x01
1271 #define HCI_LKEY_TYPE_REMOTE_UNIT       0x02
1272 #define HCI_LKEY_TYPE_DEBUG_COMB        0x03
1273 #define HCI_LKEY_TYPE_UNAUTH_COMB       0x04
1274 #define HCI_LKEY_TYPE_AUTH_COMB         0x05
1275 #define HCI_LKEY_TYPE_CHANGED_COMB      0x06
1276 #define HCI_LKEY_TYPE_UNAUTH_COMB_P_256 0x07
1277 #define HCI_LKEY_TYPE_AUTH_COMB_P_256   0x08
1278
1279 /* Internal definitions - not used over HCI */
1280 #define HCI_LKEY_TYPE_AMP_WIFI          0x80
1281 #define HCI_LKEY_TYPE_AMP_UWB           0x81
1282 #define HCI_LKEY_TYPE_UNKNOWN           0xff
1283
1284 /* Read Local Version HCI Version return values (Command Complete Event) */
1285 #define HCI_VERSION_1_0B                0x00
1286 #define HCI_VERSION_1_1                 0x01
1287
1288 /* Define an invalid value for a handle */
1289 #define HCI_INVALID_HANDLE              0xFFFF
1290
1291 /* Define max ammount of data in the HCI command */
1292 #define HCI_COMMAND_SIZE        255
1293
1294 /* Define the preamble length for all HCI Commands.
1295 ** This is 2-bytes for opcode and 1 byte for length
1296 */
1297 #define HCIC_PREAMBLE_SIZE      3
1298
1299 /* Define the preamble length for all HCI Events
1300 ** This is 1-byte for opcode and 1 byte for length
1301 */
1302 #define HCIE_PREAMBLE_SIZE      2
1303 #define HCI_SCO_PREAMBLE_SIZE   3
1304 #define HCI_DATA_PREAMBLE_SIZE  4
1305
1306 /* local Bluetooth controller id for AMP HCI */
1307 #define LOCAL_BR_EDR_CONTROLLER_ID      0
1308
1309 /* controller id types for AMP HCI */
1310 #define HCI_CONTROLLER_TYPE_BR_EDR      0
1311 #define HCI_CONTROLLER_TYPE_802_11      1
1312 #define HCI_CONTROLLER_TYPE_ECMA        2
1313 #define HCI_MAX_CONTROLLER_TYPES        3
1314
1315 /*  ConnectionLess Broadcast */
1316 #define HCI_CLB_DISABLE                 0x00
1317 #define HCI_CLB_ENABLE                  0x01
1318
1319 /* ConnectionLess Broadcast Data fragment */
1320 #define HCI_CLB_FRAGMENT_CONT           0x00
1321 #define HCI_CLB_FRAGMENT_START          0x01
1322 #define HCI_CLB_FRAGMENT_END            0x02
1323 #define HCI_CLB_FRAGMENT_SINGLE         0x03
1324
1325 /* AMP Controller Status codes
1326 */
1327 #define HCI_AMP_CTRLR_PHYSICALLY_DOWN   0
1328 #define HCI_AMP_CTRLR_USABLE_BY_BT      1
1329 #define HCI_AMP_CTRLR_UNUSABLE_FOR_BT   2
1330 #define HCI_AMP_CTRLR_LOW_CAP_FOR_BT    3
1331 #define HCI_AMP_CTRLR_MED_CAP_FOR_BT    4
1332 #define HCI_AMP_CTRLR_HIGH_CAP_FOR_BT   5
1333 #define HCI_AMP_CTRLR_FULL_CAP_FOR_BT   6
1334
1335 #define HCI_MAX_AMP_STATUS_TYPES        7
1336
1337
1338 /* Define the extended flow specification fields used by AMP */
1339 typedef struct {
1340     UINT8       id;
1341     UINT8       stype;
1342     UINT16      max_sdu_size;
1343     UINT32      sdu_inter_time;
1344     UINT32      access_latency;
1345     UINT32      flush_timeout;
1346 } tHCI_EXT_FLOW_SPEC;
1347
1348
1349 /* HCI message type definitions (for H4 messages) */
1350 #define HCIT_TYPE_COMMAND   1
1351 #define HCIT_TYPE_ACL_DATA  2
1352 #define HCIT_TYPE_SCO_DATA  3
1353 #define HCIT_TYPE_EVENT     4
1354 #define HCIT_TYPE_LM_DIAG   7
1355 #define HCIT_TYPE_NFC       16
1356
1357 #define HCIT_LM_DIAG_LENGTH 63
1358
1359 /* Parameter information for HCI_BRCM_SET_ACL_PRIORITY */
1360 #define HCI_BRCM_ACL_PRIORITY_PARAM_SIZE    3
1361 #define HCI_BRCM_ACL_PRIORITY_LOW           0x00
1362 #define HCI_BRCM_ACL_PRIORITY_HIGH          0xFF
1363 #define HCI_BRCM_SET_ACL_PRIORITY           (0x0057 | HCI_GRP_VENDOR_SPECIFIC)
1364
1365 /* Define values for LMP Test Control parameters
1366 ** Test Scenario, Hopping Mode, Power Control Mode
1367 */
1368 #define LMP_TESTCTL_TESTSC_PAUSE        0
1369 #define LMP_TESTCTL_TESTSC_TXTEST_0     1
1370 #define LMP_TESTCTL_TESTSC_TXTEST_1     2
1371 #define LMP_TESTCTL_TESTSC_TXTEST_1010  3
1372 #define LMP_TESTCTL_TESTSC_PSRND_BITSEQ 4
1373 #define LMP_TESTCTL_TESTSC_CLOSEDLB_ACL 5
1374 #define LMP_TESTCTL_TESTSC_CLOSEDLB_SCO 6
1375 #define LMP_TESTCTL_TESTSC_ACL_NOWHIT   7
1376 #define LMP_TESTCTL_TESTSC_SCO_NOWHIT   8
1377 #define LMP_TESTCTL_TESTSC_TXTEST_11110000  9
1378 #define LMP_TESTCTL_TESTSC_EXITTESTMODE 255
1379
1380 #define LMP_TESTCTL_HOPMOD_RXTX1FREQ    0
1381 #define LMP_TESTCTL_HOPMOD_HOP_EURUSA   1
1382 #define LMP_TESTCTL_HOPMOD_HOP_JAPAN    2
1383 #define LMP_TESTCTL_HOPMOD_HOP_FRANCE   3
1384 #define LMP_TESTCTL_HOPMOD_HOP_SPAIN    4
1385 #define LMP_TESTCTL_HOPMOD_REDUCED_HOP  5
1386
1387 #define LMP_TESTCTL_POWCTL_FIXEDTX_OP   0
1388 #define LMP_TESTCTL_POWCTL_ADAPTIVE     1
1389
1390 // TODO(zachoverflow): remove this once broadcom specific hacks are removed
1391 #define LMP_COMPID_BROADCOM             15
1392
1393 /*
1394 ** Define the packet types in the packet header, and a couple extra
1395 */
1396 #define PKT_TYPE_NULL   0x00
1397 #define PKT_TYPE_POLL   0x01
1398 #define PKT_TYPE_FHS    0x02
1399 #define PKT_TYPE_DM1    0x03
1400
1401 #define PKT_TYPE_DH1    0x04
1402 #define PKT_TYPE_HV1    0x05
1403 #define PKT_TYPE_HV2    0x06
1404 #define PKT_TYPE_HV3    0x07
1405 #define PKT_TYPE_DV     0x08
1406 #define PKT_TYPE_AUX1   0x09
1407
1408 #define PKT_TYPE_DM3    0x0a
1409 #define PKT_TYPE_DH3    0x0b
1410
1411 #define PKT_TYPE_DM5    0x0e
1412 #define PKT_TYPE_DH5    0x0f
1413
1414
1415 #define PKT_TYPE_ID     0x10        /* Internally used packet types */
1416 #define PKT_TYPE_BAD    0x11
1417 #define PKT_TYPE_NONE   0x12
1418
1419 /*
1420 ** Define packet size
1421 */
1422 #define HCI_DM1_PACKET_SIZE         17
1423 #define HCI_DH1_PACKET_SIZE         27
1424 #define HCI_DM3_PACKET_SIZE         121
1425 #define HCI_DH3_PACKET_SIZE         183
1426 #define HCI_DM5_PACKET_SIZE         224
1427 #define HCI_DH5_PACKET_SIZE         339
1428 #define HCI_AUX1_PACKET_SIZE        29
1429 #define HCI_HV1_PACKET_SIZE         10
1430 #define HCI_HV2_PACKET_SIZE         20
1431 #define HCI_HV3_PACKET_SIZE         30
1432 #define HCI_DV_PACKET_SIZE          9
1433 #define HCI_EDR2_DH1_PACKET_SIZE    54
1434 #define HCI_EDR2_DH3_PACKET_SIZE    367
1435 #define HCI_EDR2_DH5_PACKET_SIZE    679
1436 #define HCI_EDR3_DH1_PACKET_SIZE    83
1437 #define HCI_EDR3_DH3_PACKET_SIZE    552
1438 #define HCI_EDR3_DH5_PACKET_SIZE    1021
1439
1440 /* Feature Pages */
1441 #define HCI_EXT_FEATURES_PAGE_0     0       /* Extended Feature Page 0 (regular features) */
1442 #define HCI_EXT_FEATURES_PAGE_1     1       /* Extended Feature Page 1 */
1443 #define HCI_EXT_FEATURES_PAGE_2     2       /* Extended Feature Page 2 */
1444 #define HCI_EXT_FEATURES_PAGE_MAX   HCI_EXT_FEATURES_PAGE_2
1445
1446 #define HCI_FEATURE_BYTES_PER_PAGE      8
1447
1448 #define HCI_FEATURES_KNOWN(x) ((x[0] | x[1] | x[2] | x[3] | x[4] | x[5] | x[6] | x[7]) != 0)
1449
1450 /*
1451 **   LMP features encoding - page 0
1452 */
1453 #define HCI_FEATURE_3_SLOT_PACKETS_MASK 0x01
1454 #define HCI_FEATURE_3_SLOT_PACKETS_OFF  0
1455 #define HCI_3_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_PACKETS_OFF] & HCI_FEATURE_3_SLOT_PACKETS_MASK)
1456
1457 #define HCI_FEATURE_5_SLOT_PACKETS_MASK 0x02
1458 #define HCI_FEATURE_5_SLOT_PACKETS_OFF  0
1459 #define HCI_5_SLOT_PACKETS_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_PACKETS_OFF] & HCI_FEATURE_5_SLOT_PACKETS_MASK)
1460
1461 #define HCI_FEATURE_ENCRYPTION_MASK     0x04
1462 #define HCI_FEATURE_ENCRYPTION_OFF      0
1463 #define HCI_ENCRYPTION_SUPPORTED(x)     ((x)[HCI_FEATURE_ENCRYPTION_OFF] & HCI_FEATURE_ENCRYPTION_MASK)
1464
1465 #define HCI_FEATURE_SLOT_OFFSET_MASK    0x08
1466 #define HCI_FEATURE_SLOT_OFFSET_OFF     0
1467 #define HCI_SLOT_OFFSET_SUPPORTED(x)    ((x)[HCI_FEATURE_SLOT_OFFSET_OFF] & HCI_FEATURE_SLOT_OFFSET_MASK)
1468
1469 #define HCI_FEATURE_TIMING_ACC_MASK     0x10
1470 #define HCI_FEATURE_TIMING_ACC_OFF      0
1471 #define HCI_TIMING_ACC_SUPPORTED(x)     ((x)[HCI_FEATURE_TIMING_ACC_OFF] & HCI_FEATURE_TIMING_ACC_MASK)
1472
1473 #define HCI_FEATURE_SWITCH_MASK         0x20
1474 #define HCI_FEATURE_SWITCH_OFF          0
1475 // temporarily disable ROLE_SWITCH since there is an issue to be fixed
1476 #define HCI_SWITCH_SUPPORTED(x)         (0 & ((x)[HCI_FEATURE_SWITCH_OFF] & HCI_FEATURE_SWITCH_MASK))
1477
1478 #define HCI_FEATURE_HOLD_MODE_MASK      0x40
1479 #define HCI_FEATURE_HOLD_MODE_OFF       0
1480 #define HCI_HOLD_MODE_SUPPORTED(x)      ((x)[HCI_FEATURE_HOLD_MODE_OFF] & HCI_FEATURE_HOLD_MODE_MASK)
1481
1482 #define HCI_FEATURE_SNIFF_MODE_MASK     0x80
1483 #define HCI_FEATURE_SNIFF_MODE_OFF      0
1484 #define HCI_SNIFF_MODE_SUPPORTED(x)      ((x)[HCI_FEATURE_SNIFF_MODE_OFF] & HCI_FEATURE_SNIFF_MODE_MASK)
1485
1486 #define HCI_FEATURE_PARK_MODE_MASK      0x01
1487 #define HCI_FEATURE_PARK_MODE_OFF       1
1488 #define HCI_PARK_MODE_SUPPORTED(x)      ((x)[HCI_FEATURE_PARK_MODE_OFF] & HCI_FEATURE_PARK_MODE_MASK)
1489
1490 #define HCI_FEATURE_RSSI_MASK           0x02
1491 #define HCI_FEATURE_RSSI_OFF            1
1492 #define HCI_RSSI_SUPPORTED(x)           ((x)[HCI_FEATURE_RSSI_OFF] & HCI_FEATURE_RSSI_MASK)
1493
1494 #define HCI_FEATURE_CQM_DATA_RATE_MASK  0x04
1495 #define HCI_FEATURE_CQM_DATA_RATE_OFF   1
1496 #define HCI_CQM_DATA_RATE_SUPPORTED(x)  ((x)[HCI_FEATURE_CQM_DATA_RATE_OFF] & HCI_FEATURE_CQM_DATA_RATE_MASK)
1497
1498 #define HCI_FEATURE_SCO_LINK_MASK       0x08
1499 #define HCI_FEATURE_SCO_LINK_OFF        1
1500 #define HCI_SCO_LINK_SUPPORTED(x)       ((x)[HCI_FEATURE_SCO_LINK_OFF] & HCI_FEATURE_SCO_LINK_MASK)
1501
1502 #define HCI_FEATURE_HV2_PACKETS_MASK    0x10
1503 #define HCI_FEATURE_HV2_PACKETS_OFF     1
1504 #define HCI_HV2_PACKETS_SUPPORTED(x)    ((x)[HCI_FEATURE_HV2_PACKETS_OFF] & HCI_FEATURE_HV2_PACKETS_MASK)
1505
1506 #define HCI_FEATURE_HV3_PACKETS_MASK    0x20
1507 #define HCI_FEATURE_HV3_PACKETS_OFF     1
1508 #define HCI_HV3_PACKETS_SUPPORTED(x)    ((x)[HCI_FEATURE_HV3_PACKETS_OFF] & HCI_FEATURE_HV3_PACKETS_MASK)
1509
1510 #define HCI_FEATURE_U_LAW_MASK          0x40
1511 #define HCI_FEATURE_U_LAW_OFF           1
1512 #define HCI_LMP_U_LAW_SUPPORTED(x)      ((x)[HCI_FEATURE_U_LAW_OFF] & HCI_FEATURE_U_LAW_MASK)
1513
1514 #define HCI_FEATURE_A_LAW_MASK          0x80
1515 #define HCI_FEATURE_A_LAW_OFF           1
1516 #define HCI_LMP_A_LAW_SUPPORTED(x)      ((x)[HCI_FEATURE_A_LAW_OFF] & HCI_FEATURE_A_LAW_MASK)
1517
1518 #define HCI_FEATURE_CVSD_MASK           0x01
1519 #define HCI_FEATURE_CVSD_OFF            2
1520 #define HCI_LMP_CVSD_SUPPORTED(x)       ((x)[HCI_FEATURE_CVSD_OFF] & HCI_FEATURE_CVSD_MASK)
1521
1522 #define HCI_FEATURE_PAGING_SCHEME_MASK  0x02
1523 #define HCI_FEATURE_PAGING_SCHEME_OFF   2
1524 #define HCI_PAGING_SCHEME_SUPPORTED(x) ((x)[HCI_FEATURE_PAGING_SCHEME_OFF] & HCI_FEATURE_PAGING_SCHEME_MASK)
1525
1526 #define HCI_FEATURE_POWER_CTRL_MASK     0x04
1527 #define HCI_FEATURE_POWER_CTRL_OFF      2
1528 #define HCI_POWER_CTRL_SUPPORTED(x)     ((x)[HCI_FEATURE_POWER_CTRL_OFF] & HCI_FEATURE_POWER_CTRL_MASK)
1529
1530 #define HCI_FEATURE_TRANSPNT_MASK       0x08
1531 #define HCI_FEATURE_TRANSPNT_OFF        2
1532 #define HCI_LMP_TRANSPNT_SUPPORTED(x)   ((x)[HCI_FEATURE_TRANSPNT_OFF] & HCI_FEATURE_TRANSPNT_MASK)
1533
1534 #define HCI_FEATURE_FLOW_CTRL_LAG_MASK  0x70
1535 #define HCI_FEATURE_FLOW_CTRL_LAG_OFF   2
1536 #define HCI_FLOW_CTRL_LAG_VALUE(x)      (((x)[HCI_FEATURE_FLOW_CTRL_LAG_OFF] & HCI_FEATURE_FLOW_CTRL_LAG_MASK) >> 4)
1537
1538 #define HCI_FEATURE_BROADCAST_ENC_MASK  0x80
1539 #define HCI_FEATURE_BROADCAST_ENC_OFF   2
1540 #define HCI_LMP_BCAST_ENC_SUPPORTED(x)  ((x)[HCI_FEATURE_BROADCAST_ENC_OFF] & HCI_FEATURE_BROADCAST_ENC_MASK)
1541
1542 #define HCI_FEATURE_SCATTER_MODE_MASK   0x01
1543 #define HCI_FEATURE_SCATTER_MODE_OFF    3
1544 #define HCI_LMP_SCATTER_MODE_SUPPORTED(x) ((x)[HCI_FEATURE_SCATTER_MODE_OFF] & HCI_FEATURE_SCATTER_MODE_MASK)
1545
1546 #define HCI_FEATURE_EDR_ACL_2MPS_MASK   0x02
1547 #define HCI_FEATURE_EDR_ACL_2MPS_OFF    3
1548 #define HCI_EDR_ACL_2MPS_SUPPORTED(x)   ((x)[HCI_FEATURE_EDR_ACL_2MPS_OFF] & HCI_FEATURE_EDR_ACL_2MPS_MASK)
1549
1550 #define HCI_FEATURE_EDR_ACL_3MPS_MASK   0x04
1551 #define HCI_FEATURE_EDR_ACL_3MPS_OFF    3
1552 #define HCI_EDR_ACL_3MPS_SUPPORTED(x)   ((x)[HCI_FEATURE_EDR_ACL_3MPS_OFF] & HCI_FEATURE_EDR_ACL_3MPS_MASK)
1553
1554 #define HCI_FEATURE_ENHANCED_INQ_MASK   0x08
1555 #define HCI_FEATURE_ENHANCED_INQ_OFF    3
1556 #define HCI_ENHANCED_INQ_SUPPORTED(x)   ((x)[HCI_FEATURE_ENHANCED_INQ_OFF] & HCI_FEATURE_ENHANCED_INQ_MASK)
1557
1558 #define HCI_FEATURE_INTERLACED_INQ_SCAN_MASK   0x10
1559 #define HCI_FEATURE_INTERLACED_INQ_SCAN_OFF    3
1560 #define HCI_LMP_INTERLACED_INQ_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_INQ_SCAN_OFF] & HCI_FEATURE_INTERLACED_INQ_SCAN_MASK)
1561
1562 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK  0x20
1563 #define HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF   3
1564 #define HCI_LMP_INTERLACED_PAGE_SCAN_SUPPORTED(x) ((x)[HCI_FEATURE_INTERLACED_PAGE_SCAN_OFF] & HCI_FEATURE_INTERLACED_PAGE_SCAN_MASK)
1565
1566 #define HCI_FEATURE_INQ_RSSI_MASK       0x40
1567 #define HCI_FEATURE_INQ_RSSI_OFF        3
1568 #define HCI_LMP_INQ_RSSI_SUPPORTED(x)   ((x)[HCI_FEATURE_INQ_RSSI_OFF] & HCI_FEATURE_INQ_RSSI_MASK)
1569
1570 #define HCI_FEATURE_ESCO_EV3_MASK       0x80
1571 #define HCI_FEATURE_ESCO_EV3_OFF        3
1572 #define HCI_ESCO_EV3_SUPPORTED(x)       ((x)[HCI_FEATURE_ESCO_EV3_OFF] & HCI_FEATURE_ESCO_EV3_MASK)
1573
1574 #define HCI_FEATURE_ESCO_EV4_MASK       0x01
1575 #define HCI_FEATURE_ESCO_EV4_OFF        4
1576 #define HCI_ESCO_EV4_SUPPORTED(x)       ((x)[HCI_FEATURE_ESCO_EV4_OFF] & HCI_FEATURE_ESCO_EV4_MASK)
1577
1578 #define HCI_FEATURE_ESCO_EV5_MASK       0x02
1579 #define HCI_FEATURE_ESCO_EV5_OFF        4
1580 #define HCI_ESCO_EV5_SUPPORTED(x)       ((x)[HCI_FEATURE_ESCO_EV5_OFF] & HCI_FEATURE_ESCO_EV5_MASK)
1581
1582 #define HCI_FEATURE_ABSENCE_MASKS_MASK  0x04
1583 #define HCI_FEATURE_ABSENCE_MASKS_OFF   4
1584 #define HCI_LMP_ABSENCE_MASKS_SUPPORTED(x) ((x)[HCI_FEATURE_ABSENCE_MASKS_OFF] & HCI_FEATURE_ABSENCE_MASKS_MASK)
1585
1586 #define HCI_FEATURE_AFH_CAP_SLAVE_MASK  0x08
1587 #define HCI_FEATURE_AFH_CAP_SLAVE_OFF   4
1588 #define HCI_LMP_AFH_CAP_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_SLAVE_OFF] & HCI_FEATURE_AFH_CAP_SLAVE_MASK)
1589
1590 #define HCI_FEATURE_AFH_CLASS_SLAVE_MASK 0x10
1591 #define HCI_FEATURE_AFH_CLASS_SLAVE_OFF  4
1592 #define HCI_LMP_AFH_CLASS_SLAVE_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_SLAVE_OFF] & HCI_FEATURE_AFH_CLASS_SLAVE_MASK)
1593
1594 #if 1
1595 #define HCI_FEATURE_BREDR_NOT_SPT_MASK     0x20
1596 #define HCI_FEATURE_BREDR_NOT_SPT_OFF      4
1597 #define HCI_BREDR_NOT_SPT_SUPPORTED(x) ((x)[HCI_FEATURE_BREDR_NOT_SPT_OFF] & HCI_FEATURE_BREDR_NOT_SPT_MASK)
1598
1599 #define HCI_FEATURE_LE_SPT_MASK      0x40
1600 #define HCI_FEATURE_LE_SPT_OFF       4
1601 #define HCI_LE_SPT_SUPPORTED(x)  ((x)[HCI_FEATURE_LE_SPT_OFF] & HCI_FEATURE_LE_SPT_MASK)
1602 #else
1603
1604 #define HCI_FEATURE_ALIAS_AUTH_MASK     0x20
1605 #define HCI_FEATURE_ALIAS_AUTH_OFF      4
1606 #define HCI_LMP_ALIAS_AUTH_SUPPORTED(x) ((x)[HCI_FEATURE_ALIAS_AUTH_OFF] & HCI_FEATURE_ALIAS_AUTH_MASK)
1607
1608 #define HCI_FEATURE_ANON_MODE_MASK      0x40
1609 #define HCI_FEATURE_ANON_MODE_OFF       4
1610 #define HCI_LMP_ANON_MODE_SUPPORTED(x)  ((x)[HCI_FEATURE_ANON_MODE_OFF] & HCI_FEATURE_ANON_MODE_MASK)
1611 #endif
1612
1613 #define HCI_FEATURE_3_SLOT_EDR_ACL_MASK 0x80
1614 #define HCI_FEATURE_3_SLOT_EDR_ACL_OFF  4
1615 #define HCI_3_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ACL_OFF] & HCI_FEATURE_3_SLOT_EDR_ACL_MASK)
1616
1617 #define HCI_FEATURE_5_SLOT_EDR_ACL_MASK 0x01
1618 #define HCI_FEATURE_5_SLOT_EDR_ACL_OFF  5
1619 #define HCI_5_SLOT_EDR_ACL_SUPPORTED(x) ((x)[HCI_FEATURE_5_SLOT_EDR_ACL_OFF] & HCI_FEATURE_5_SLOT_EDR_ACL_MASK)
1620
1621 #define HCI_FEATURE_SNIFF_SUB_RATE_MASK 0x02
1622 #define HCI_FEATURE_SNIFF_SUB_RATE_OFF  5
1623 #define HCI_SNIFF_SUB_RATE_SUPPORTED(x) ((x)[HCI_FEATURE_SNIFF_SUB_RATE_OFF] & HCI_FEATURE_SNIFF_SUB_RATE_MASK)
1624
1625 #define HCI_FEATURE_ATOMIC_ENCRYPT_MASK 0x04
1626 #define HCI_FEATURE_ATOMIC_ENCRYPT_OFF  5
1627 #define HCI_ATOMIC_ENCRYPT_SUPPORTED(x) ((x)[HCI_FEATURE_ATOMIC_ENCRYPT_OFF] & HCI_FEATURE_ATOMIC_ENCRYPT_MASK)
1628
1629 #define HCI_FEATURE_AFH_CAP_MASTR_MASK  0x08
1630 #define HCI_FEATURE_AFH_CAP_MASTR_OFF   5
1631 #define HCI_LMP_AFH_CAP_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CAP_MASTR_OFF] & HCI_FEATURE_AFH_CAP_MASTR_MASK)
1632
1633 #define HCI_FEATURE_AFH_CLASS_MASTR_MASK 0x10
1634 #define HCI_FEATURE_AFH_CLASS_MASTR_OFF  5
1635 #define HCI_LMP_AFH_CLASS_MASTR_SUPPORTED(x) ((x)[HCI_FEATURE_AFH_CLASS_MASTR_OFF] & HCI_FEATURE_AFH_CLASS_MASTR_MASK)
1636
1637 #define HCI_FEATURE_EDR_ESCO_2MPS_MASK  0x20
1638 #define HCI_FEATURE_EDR_ESCO_2MPS_OFF   5
1639 #define HCI_EDR_ESCO_2MPS_SUPPORTED(x)  ((x)[HCI_FEATURE_EDR_ESCO_2MPS_OFF] & HCI_FEATURE_EDR_ESCO_2MPS_MASK)
1640
1641 #define HCI_FEATURE_EDR_ESCO_3MPS_MASK  0x40
1642 #define HCI_FEATURE_EDR_ESCO_3MPS_OFF   5
1643 #define HCI_EDR_ESCO_3MPS_SUPPORTED(x)  ((x)[HCI_FEATURE_EDR_ESCO_3MPS_OFF] & HCI_FEATURE_EDR_ESCO_3MPS_MASK)
1644
1645 #define HCI_FEATURE_3_SLOT_EDR_ESCO_MASK 0x80
1646 #define HCI_FEATURE_3_SLOT_EDR_ESCO_OFF  5
1647 #define HCI_3_SLOT_EDR_ESCO_SUPPORTED(x) ((x)[HCI_FEATURE_3_SLOT_EDR_ESCO_OFF] & HCI_FEATURE_3_SLOT_EDR_ESCO_MASK)
1648
1649 #define HCI_FEATURE_EXT_INQ_RSP_MASK    0x01
1650 #define HCI_FEATURE_EXT_INQ_RSP_OFF     6
1651 #define HCI_EXT_INQ_RSP_SUPPORTED(x)    ((x)[HCI_FEATURE_EXT_INQ_RSP_OFF] & HCI_FEATURE_EXT_INQ_RSP_MASK)
1652
1653 #if 1 /* TOKYO spec definition */
1654 #define HCI_FEATURE_SIMUL_LE_BREDR_MASK 0x02
1655 #define HCI_FEATURE_SIMUL_LE_BREDR_OFF  6
1656 #define HCI_SIMUL_LE_BREDR_SUPPORTED(x) ((x)[HCI_FEATURE_SIMUL_LE_BREDR_OFF] & HCI_FEATURE_SIMUL_LE_BREDR_MASK)
1657
1658 #else
1659 #define HCI_FEATURE_ANUM_PIN_AWARE_MASK 0x02
1660 #define HCI_FEATURE_ANUM_PIN_AWARE_OFF  6
1661 #define HCI_ANUM_PIN_AWARE_SUPPORTED(x) ((x)[HCI_FEATURE_ANUM_PIN_AWARE_OFF] & HCI_FEATURE_ANUM_PIN_AWARE_MASK)
1662 #endif
1663
1664 #define HCI_FEATURE_ANUM_PIN_CAP_MASK   0x04
1665 #define HCI_FEATURE_ANUM_PIN_CAP_OFF    6
1666 #define HCI_ANUM_PIN_CAP_SUPPORTED(x)   ((x)[HCI_FEATURE_ANUM_PIN_CAP_OFF] & HCI_FEATURE_ANUM_PIN_CAP_MASK)
1667
1668 #define HCI_FEATURE_SIMPLE_PAIRING_MASK 0x08
1669 #define HCI_FEATURE_SIMPLE_PAIRING_OFF  6
1670 #define HCI_SIMPLE_PAIRING_SUPPORTED(x) ((x)[HCI_FEATURE_SIMPLE_PAIRING_OFF] & HCI_FEATURE_SIMPLE_PAIRING_MASK)
1671
1672 #define HCI_FEATURE_ENCAP_PDU_MASK      0x10
1673 #define HCI_FEATURE_ENCAP_PDU_OFF       6
1674 #define HCI_ENCAP_PDU_SUPPORTED(x)      ((x)[HCI_FEATURE_ENCAP_PDU_OFF] & HCI_FEATURE_ENCAP_PDU_MASK)
1675
1676 #define HCI_FEATURE_ERROR_DATA_MASK     0x20
1677 #define HCI_FEATURE_ERROR_DATA_OFF      6
1678 #define HCI_ERROR_DATA_SUPPORTED(x)     ((x)[HCI_FEATURE_ERROR_DATA_OFF] & HCI_FEATURE_ERROR_DATA_MASK)
1679
1680 #define HCI_FEATURE_NON_FLUSHABLE_PB_MASK      0x40
1681 #define HCI_FEATURE_NON_FLUSHABLE_PB_OFF       6
1682
1683 /* This feature is causing frequent link drops when doing call switch with certain av/hfp headsets */
1684 #define HCI_NON_FLUSHABLE_PB_SUPPORTED(x)      (0)//((x)[HCI_FEATURE_NON_FLUSHABLE_PB_OFF] & HCI_FEATURE_NON_FLUSHABLE_PB_MASK)
1685
1686 #define HCI_FEATURE_LINK_SUP_TO_EVT_MASK 0x01
1687 #define HCI_FEATURE_LINK_SUP_TO_EVT_OFF  7
1688 #define HCI_LINK_SUP_TO_EVT_SUPPORTED(x) ((x)[HCI_FEATURE_LINK_SUP_TO_EVT_OFF] & HCI_FEATURE_LINK_SUP_TO_EVT_MASK)
1689
1690 #define HCI_FEATURE_INQ_RESP_TX_MASK     0x02
1691 #define HCI_FEATURE_INQ_RESP_TX_OFF      7
1692 #define HCI_INQ_RESP_TX_SUPPORTED(x)     ((x)[HCI_FEATURE_INQ_RESP_TX_OFF] & HCI_FEATURE_INQ_RESP_TX_MASK)
1693
1694 #define HCI_FEATURE_EXTENDED_MASK       0x80
1695 #define HCI_FEATURE_EXTENDED_OFF        7
1696 #define HCI_LMP_EXTENDED_SUPPORTED(x)   ((x)[HCI_FEATURE_EXTENDED_OFF] & HCI_FEATURE_EXTENDED_MASK)
1697
1698 /*
1699 **   LMP features encoding - page 1
1700 */
1701 #define HCI_EXT_FEATURE_SSP_HOST_MASK 0x01
1702 #define HCI_EXT_FEATURE_SSP_HOST_OFF  0
1703 #define HCI_SSP_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SSP_HOST_OFF] & HCI_EXT_FEATURE_SSP_HOST_MASK)
1704
1705 #define HCI_EXT_FEATURE_LE_HOST_MASK 0x02
1706 #define HCI_EXT_FEATURE_LE_HOST_OFF  0
1707 #define HCI_LE_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_LE_HOST_OFF] & HCI_EXT_FEATURE_LE_HOST_MASK)
1708
1709 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK 0x04
1710 #define HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF  0
1711 #define HCI_SIMUL_DUMO_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SIMUL_DUMO_HOST_OFF] & HCI_EXT_FEATURE_SIMUL_DUMO_HOST_MASK)
1712
1713 #define HCI_EXT_FEATURE_SC_HOST_MASK 0x08
1714 #define HCI_EXT_FEATURE_SC_HOST_OFF  0
1715 #define HCI_SC_HOST_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_HOST_OFF] & HCI_EXT_FEATURE_SC_HOST_MASK)
1716
1717 /*
1718 **   LMP features encoding - page 2
1719 */
1720 #define HCI_EXT_FEATURE_CSB_MASTER_MASK         0x01
1721 #define HCI_EXT_FEATURE_CSB_MASTER_OFF          0
1722 #define HCI_CSB_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_MASTER_OFF] & HCI_EXT_FEATURE_CSB_MASTER_MASK)
1723
1724 #define HCI_EXT_FEATURE_CSB_SLAVE_MASK          0x02
1725 #define HCI_EXT_FEATURE_CSB_SLAVE_OFF           0
1726 #define HCI_CSB_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_CSB_SLAVE_OFF] & HCI_EXT_FEATURE_CSB_SLAVE_MASK)
1727
1728 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK  0x04
1729 #define HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF   0
1730 #define HCI_SYNC_TRAIN_MASTER_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_OFF] & HCI_EXT_FEATURE_SYNC_TRAIN_MASTER_MASK)
1731
1732 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK    0x08
1733 #define HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF     0
1734 #define HCI_SYNC_SCAN_SLAVE_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_OFF] & HCI_EXT_FEATURE_SYNC_SCAN_SLAVE_MASK)
1735
1736 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK     0x10
1737 #define HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF      0
1738 #define HCI_INQ_RESP_NOTIF_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_INQ_RESP_NOTIF_OFF] & HCI_EXT_FEATURE_INQ_RESP_NOTIF_MASK)
1739
1740 #define HCI_EXT_FEATURE_SC_CTRLR_MASK           0x01
1741 #define HCI_EXT_FEATURE_SC_CTRLR_OFF            1
1742 #define HCI_SC_CTRLR_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_SC_CTRLR_OFF] & HCI_EXT_FEATURE_SC_CTRLR_MASK)
1743
1744 #define HCI_EXT_FEATURE_PING_MASK               0x02
1745 #define HCI_EXT_FEATURE_PING_OFF                1
1746 #define HCI_PING_SUPPORTED(x) ((x)[HCI_EXT_FEATURE_PING_OFF] & HCI_EXT_FEATURE_PING_MASK)
1747
1748 /*
1749 **   LE features encoding - page 0 (the only page for now)
1750 */
1751 /* LE Encryption */
1752 #define HCI_LE_FEATURE_LE_ENCRYPTION_MASK       0x01
1753 #define HCI_LE_FEATURE_LE_ENCRYPTION_OFF        0
1754 #define HCI_LE_ENCRYPTION_SUPPORTED(x) ((x)[HCI_LE_FEATURE_LE_ENCRYPTION_OFF] & HCI_LE_FEATURE_LE_ENCRYPTION_MASK)
1755
1756 /* Connection Parameters Request Procedure */
1757 #define HCI_LE_FEATURE_CONN_PARAM_REQ_MASK       0x02
1758 #define HCI_LE_FEATURE_CONN_PARAM_REQ_OFF        0
1759 #define HCI_LE_CONN_PARAM_REQ_SUPPORTED(x) ((x)[HCI_LE_FEATURE_CONN_PARAM_REQ_OFF] & HCI_LE_FEATURE_CONN_PARAM_REQ_MASK)
1760
1761 /* Extended Reject Indication */
1762 #define HCI_LE_FEATURE_EXT_REJ_IND_MASK       0x04
1763 #define HCI_LE_FEATURE_EXT_REJ_IND_OFF        0
1764 #define HCI_LE_EXT_REJ_IND_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_REJ_IND_OFF] & HCI_LE_FEATURE_EXT_REJ_IND_MASK)
1765
1766 /* Slave-initiated Features Exchange */
1767 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK       0x08
1768 #define HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF        0
1769 #define HCI_LE_SLAVE_INIT_FEAT_EXC_SUPPORTED(x) ((x)[HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_OFF] & HCI_LE_FEATURE_SLAVE_INIT_FEAT_EXC_MASK)
1770
1771 /* Enhanced privacy Feature: bit 6 */
1772 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK       0x40
1773 #define HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF        0
1774 #define HCI_LE_ENHANCED_PRIVACY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_ENHANCED_PRIVACY_OFF] & HCI_LE_FEATURE_ENHANCED_PRIVACY_MASK)
1775
1776 /* Extended scanner filter policy : 7 */
1777 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK       0x80
1778 #define HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF        0
1779 #define HCI_LE_EXT_SCAN_FILTER_POLICY_SUPPORTED(x) ((x)[HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_OFF] & HCI_LE_FEATURE_EXT_SCAN_FILTER_POLICY_MASK)
1780
1781 /* Slave-initiated Features Exchange */
1782 #define HCI_LE_FEATURE_DATA_LEN_EXT_MASK       0x20
1783 #define HCI_LE_FEATURE_DATA_LEN_EXT_OFF        0
1784 #define HCI_LE_DATA_LEN_EXT_SUPPORTED(x) ((x)[HCI_LE_FEATURE_DATA_LEN_EXT_OFF] & HCI_LE_FEATURE_DATA_LEN_EXT_MASK)
1785
1786 /*
1787 **   Local Supported Commands encoding
1788 */
1789 #define HCI_NUM_SUPP_COMMANDS_BYTES           64
1790
1791 /* Supported Commands Byte 0 */
1792 #define HCI_SUPP_COMMANDS_INQUIRY_MASK 0x01
1793 #define HCI_SUPP_COMMANDS_INQUIRY_OFF  0
1794 #define HCI_INQUIRY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_OFF] & HCI_SUPP_COMMANDS_INQUIRY_MASK)
1795
1796 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK 0x02
1797 #define HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF  0
1798 #define HCI_INQUIRY_CANCEL_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_INQUIRY_CANCEL_OFF] & HCI_SUPP_COMMANDS_INQUIRY_CANCEL_MASK)
1799
1800 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK     0x04
1801 #define HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF      0
1802 #define HCI_PERIODIC_INQUIRY_SUPPORTED(x)     ((x)[HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_PERIODIC_INQUIRY_MASK)
1803
1804 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK    0x08
1805 #define HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF     0
1806 #define HCI_EXIT_PERIODIC_INQUIRY_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_OFF] & HCI_SUPP_COMMANDS_EXIT_PERIODIC_INQUIRY_MASK)
1807
1808 #define HCI_SUPP_COMMANDS_CREATE_CONN_MASK     0x10
1809 #define HCI_SUPP_COMMANDS_CREATE_CONN_OFF      0
1810 #define HCI_CREATE_CONN_SUPPORTED(x)     ((x)[HCI_SUPP_COMMANDS_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CREATE_CONN_MASK)
1811
1812 #define HCI_SUPP_COMMANDS_DISCONNECT_MASK         0x20
1813 #define HCI_SUPP_COMMANDS_DISCONNECT_OFF          0
1814 #define HCI_DISCONNECT_SUPPORTED(x)         ((x)[HCI_SUPP_COMMANDS_DISCONNECT_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_MASK)
1815
1816 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK      0x40
1817 #define HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF       0
1818 #define HCI_ADD_SCO_CONN_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_ADD_SCO_CONN_OFF] & HCI_SUPP_COMMANDS_ADD_SCO_CONN_MASK)
1819
1820 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK     0x80
1821 #define HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF      0
1822 #define HCI_CANCEL_CREATE_CONN_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_OFF] & HCI_SUPP_COMMANDS_CANCEL_CREATE_CONN_MASK)
1823
1824 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK      0x01
1825 #define HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF       1
1826 #define HCI_ACCEPT_CONN_REQUEST_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_ACCEPT_CONN_REQUEST_MASK)
1827
1828 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK           0x02
1829 #define HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF            1
1830 #define HCI_REJECT_CONN_REQUEST_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_OFF] & HCI_SUPP_COMMANDS_REJECT_CONN_REQUEST_MASK)
1831
1832 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK  0x04
1833 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF   1
1834 #define HCI_LINK_KEY_REQUEST_REPLY_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_REPLY_MASK)
1835
1836 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK       0x08
1837 #define HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF        1
1838 #define HCI_LINK_KEY_REQUEST_NEG_REPLY_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_LINK_KEY_REQUEST_NEG_REPLY_MASK)
1839
1840 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK    0x10
1841 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF     1
1842 #define HCI_PIN_CODE_REQUEST_REPLY_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_REPLY_MASK)
1843
1844 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK    0x20
1845 #define HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF     1
1846 #define HCI_PIN_CODE_REQUEST_NEG_REPLY_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_PIN_CODE_REQUEST_NEG_REPLY_MASK)
1847
1848 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK          0x40
1849 #define HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF           1
1850 #define HCI_CHANGE_CONN_PKT_TYPE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_PKT_TYPE_MASK)
1851
1852 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK          0x80
1853 #define HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF           1
1854 #define HCI_AUTH_REQUEST_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_AUTH_REQUEST_OFF] & HCI_SUPP_COMMANDS_AUTH_REQUEST_MASK)
1855
1856 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK      0x01
1857 #define HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF       2
1858 #define HCI_SET_CONN_ENCRYPTION_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_OFF] & HCI_SUPP_COMMANDS_SET_CONN_ENCRYPTION_MASK)
1859
1860 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK           0x02
1861 #define HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF            2
1862 #define HCI_CHANGE_CONN_LINK_KEY_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_CHANGE_CONN_LINK_KEY_MASK)
1863
1864 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK  0x04
1865 #define HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF   2
1866 #define HCI_MASTER_LINK_KEY_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_MASTER_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_MASTER_LINK_KEY_MASK)
1867
1868 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK       0x08
1869 #define HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF        2
1870 #define HCI_REMOTE_NAME_REQUEST_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_REMOTE_NAME_REQUEST_MASK)
1871
1872 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK    0x10
1873 #define HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF     2
1874 #define HCI_CANCEL_REMOTE_NAME_REQUEST_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_OFF] & HCI_SUPP_COMMANDS_CANCEL_REMOTE_NAME_REQUEST_MASK)
1875
1876 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK    0x20
1877 #define HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF     2
1878 #define HCI_READ_REMOTE_SUPP_FEATURES_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_SUPP_FEATURES_MASK)
1879
1880 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK          0x40
1881 #define HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF           2
1882 #define HCI_READ_REMOTE_EXT_FEATURES_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_EXT_FEATURES_MASK)
1883
1884 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK          0x80
1885 #define HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF           2
1886 #define HCI_READ_REMOTE_VER_INFO_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_REMOTE_VER_INFO_MASK)
1887
1888 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK           0x01
1889 #define HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF            3
1890 #define HCI_READ_CLOCK_OFFSET_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_OFF] & HCI_SUPP_COMMANDS_READ_CLOCK_OFFSET_MASK)
1891
1892 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK  0x02
1893 #define HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF   3
1894 #define HCI_READ_LMP_HANDLE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_READ_LMP_HANDLE_OFF] & HCI_SUPP_COMMANDS_READ_LMP_HANDLE_MASK)
1895
1896 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK           0x02
1897 #define HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF            4
1898 #define HCI_HOLD_MODE_CMD_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_HOLD_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_HOLD_MODE_CMD_MASK)
1899
1900 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK  0x04
1901 #define HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF   4
1902 #define HCI_SNIFF_MODE_CMD_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_OFF] & HCI_SUPP_COMMANDS_SNIFF_MODE_CMD_MASK)
1903
1904 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK       0x08
1905 #define HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF        4
1906 #define HCI_EXIT_SNIFF_MODE_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_OFF] & HCI_SUPP_COMMANDS_EXIT_SNIFF_MODE_MASK)
1907
1908 #define HCI_SUPP_COMMANDS_PARK_STATE_MASK    0x10
1909 #define HCI_SUPP_COMMANDS_PARK_STATE_OFF     4
1910 #define HCI_PARK_STATE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_PARK_STATE_MASK)
1911
1912 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK    0x20
1913 #define HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF     4
1914 #define HCI_EXIT_PARK_STATE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_EXIT_PARK_STATE_OFF] & HCI_SUPP_COMMANDS_EXIT_PARK_STATE_MASK)
1915
1916 #define HCI_SUPP_COMMANDS_QOS_SETUP_MASK          0x40
1917 #define HCI_SUPP_COMMANDS_QOS_SETUP_OFF           4
1918 #define HCI_QOS_SETUP_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_QOS_SETUP_OFF] & HCI_SUPP_COMMANDS_QOS_SETUP_MASK)
1919
1920 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK          0x80
1921 #define HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF           4
1922 #define HCI_ROLE_DISCOVERY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_ROLE_DISCOVERY_OFF] & HCI_SUPP_COMMANDS_ROLE_DISCOVERY_MASK)
1923
1924 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK      0x01
1925 #define HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF       5
1926 #define HCI_SWITCH_ROLE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_SWITCH_ROLE_OFF] & HCI_SUPP_COMMANDS_SWITCH_ROLE_MASK)
1927
1928 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK           0x02
1929 #define HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF            5
1930 #define HCI_READ_LINK_POLICY_SET_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_LINK_POLICY_SET_MASK)
1931
1932 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK  0x04
1933 #define HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF   5
1934 #define HCI_WRITE_LINK_POLICY_SET_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_POLICY_SET_MASK)
1935
1936 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK       0x08
1937 #define HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF        5
1938 #define HCI_READ_DEF_LINK_POLICY_SET_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_READ_DEF_LINK_POLICY_SET_MASK)
1939
1940 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK    0x10
1941 #define HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF     5
1942 #define HCI_WRITE_DEF_LINK_POLICY_SET_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_OFF] & HCI_SUPP_COMMANDS_WRITE_DEF_LINK_POLICY_SET_MASK)
1943
1944 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK    0x20
1945 #define HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF     5
1946 #define HCI_FLOW_SPECIFICATION_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_OFF] & HCI_SUPP_COMMANDS_FLOW_SPECIFICATION_MASK)
1947
1948 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK          0x40
1949 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF           5
1950 #define HCI_SET_EVENT_MASK_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_MASK)
1951
1952 #define HCI_SUPP_COMMANDS_RESET_MASK          0x80
1953 #define HCI_SUPP_COMMANDS_RESET_OFF           5
1954 #define HCI_RESET_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_RESET_OFF] & HCI_SUPP_COMMANDS_RESET_MASK)
1955
1956 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK      0x01
1957 #define HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF       6
1958 #define HCI_SET_EVENT_FILTER_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_SET_EVENT_FILTER_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_FILTER_MASK)
1959
1960 #define HCI_SUPP_COMMANDS_FLUSH_MASK           0x02
1961 #define HCI_SUPP_COMMANDS_FLUSH_OFF            6
1962 #define HCI_FLUSH_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_FLUSH_OFF] & HCI_SUPP_COMMANDS_FLUSH_MASK)
1963
1964 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK  0x04
1965 #define HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF   6
1966 #define HCI_READ_PIN_TYPE_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PIN_TYPE_MASK)
1967
1968 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK       0x08
1969 #define HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF        6
1970 #define HCI_WRITE_PIN_TYPE_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PIN_TYPE_MASK)
1971
1972 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK    0x10
1973 #define HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF     6
1974 #define HCI_CREATE_NEW_UNIT_KEY_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_OFF] & HCI_SUPP_COMMANDS_CREATE_NEW_UNIT_KEY_MASK)
1975
1976 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK    0x20
1977 #define HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF     6
1978 #define HCI_READ_STORED_LINK_KEY_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_READ_STORED_LINK_KEY_MASK)
1979
1980 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK          0x40
1981 #define HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF           6
1982 #define HCI_WRITE_STORED_LINK_KEY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_WRITE_STORED_LINK_KEY_MASK)
1983
1984 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK          0x80
1985 #define HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF           6
1986 #define HCI_DELETE_STORED_LINK_KEY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_OFF] & HCI_SUPP_COMMANDS_DELETE_STORED_LINK_KEY_MASK)
1987
1988 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK      0x01
1989 #define HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF       7
1990 #define HCI_WRITE_LOCAL_NAME_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCAL_NAME_MASK)
1991
1992 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK           0x02
1993 #define HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF            7
1994 #define HCI_READ_LOCAL_NAME_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_NAME_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_NAME_MASK)
1995
1996 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK  0x04
1997 #define HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF   7
1998 #define HCI_READ_CONN_ACCEPT_TOUT_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_CONN_ACCEPT_TOUT_MASK)
1999
2000 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK       0x08
2001 #define HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF        7
2002 #define HCI_WRITE_CONN_ACCEPT_TOUT_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_CONN_ACCEPT_TOUT_MASK)
2003
2004 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK    0x10
2005 #define HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF     7
2006 #define HCI_READ_PAGE_TOUT_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_TOUT_MASK)
2007
2008 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK    0x20
2009 #define HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF     7
2010 #define HCI_WRITE_PAGE_TOUT_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_TOUT_MASK)
2011
2012 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK          0x40
2013 #define HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF           7
2014 #define HCI_READ_SCAN_ENABLE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SCAN_ENABLE_MASK)
2015
2016 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK          0x80
2017 #define HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF           7
2018 #define HCI_WRITE_SCAN_ENABLE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SCAN_ENABLE_MASK)
2019
2020 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK      0x01
2021 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF       8
2022 #define HCI_READ_PAGE_SCAN_ACTIVITY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_ACTIVITY_MASK)
2023
2024 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK           0x02
2025 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF            8
2026 #define HCI_WRITE_PAGE_SCAN_ACTIVITY_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_ACTIVITY_MASK)
2027
2028 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK  0x04
2029 #define HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF   8
2030 #define HCI_READ_INQURIY_SCAN_ACTIVITY_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_INQURIY_SCAN_ACTIVITY_MASK)
2031
2032 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK       0x08
2033 #define HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF        8
2034 #define HCI_WRITE_INQURIY_SCAN_ACTIVITY_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_INQURIY_SCAN_ACTIVITY_MASK)
2035
2036 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK    0x10
2037 #define HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF     8
2038 #define HCI_READ_AUTH_ENABLE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_AUTH_ENABLE_MASK)
2039
2040 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK    0x20
2041 #define HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF     8
2042 #define HCI_WRITE_AUTH_ENABLE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTH_ENABLE_MASK)
2043
2044 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK          0x40
2045 #define HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF           8
2046 #define HCI_READ_ENCRYPT_ENABLE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_ENCRYPT_ENABLE_MASK)
2047
2048 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK          0x80
2049 #define HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF           8
2050 #define HCI_WRITE_ENCRYPT_ENABLE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_ENCRYPT_ENABLE_MASK)
2051
2052 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK      0x01
2053 #define HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF       9
2054 #define HCI_READ_CLASS_DEVICE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_READ_CLASS_DEVICE_MASK)
2055
2056 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK           0x02
2057 #define HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF            9
2058 #define HCI_WRITE_CLASS_DEVICE_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_OFF] & HCI_SUPP_COMMANDS_WRITE_CLASS_DEVICE_MASK)
2059
2060 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK  0x04
2061 #define HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF   9
2062 #define HCI_READ_VOICE_SETTING_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_READ_VOICE_SETTING_MASK)
2063
2064 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK       0x08
2065 #define HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF        9
2066 #define HCI_WRITE_VOICE_SETTING_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_OFF] & HCI_SUPP_COMMANDS_WRITE_VOICE_SETTING_MASK)
2067
2068 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK    0x10
2069 #define HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF     9
2070 #define HCI_READ_AUTO_FLUSH_TOUT_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTO_FLUSH_TOUT_MASK)
2071
2072 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK    0x20
2073 #define HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF     9
2074 #define HCI_WRITE_AUTO_FLUSH_TOUT_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTO_FLUSH_TOUT_MASK)
2075
2076 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK          0x40
2077 #define HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF           9
2078 #define HCI_READ_NUM_BROAD_RETRANS_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_READ_NUM_BROAD_RETRANS_MASK)
2079
2080 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK          0x80
2081 #define HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF           9
2082 #define HCI_WRITE_NUM_BROAD_RETRANS_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_OFF] & HCI_SUPP_COMMANDS_WRITE_NUM_BROAD_RETRANS_MASK)
2083
2084 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK      0x01
2085 #define HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF       10
2086 #define HCI_READ_HOLD_MODE_ACTIVITY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_READ_HOLD_MODE_ACTIVITY_MASK)
2087
2088 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK           0x02
2089 #define HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF            10
2090 #define HCI_WRITE_HOLD_MODE_ACTIVITY_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_OFF] & HCI_SUPP_COMMANDS_WRITE_HOLD_MODE_ACTIVITY_MASK)
2091
2092 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK  0x04
2093 #define HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF   10
2094 #define HCI_READ_TRANS_PWR_LEVEL_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANS_PWR_LEVEL_MASK)
2095
2096 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK       0x08
2097 #define HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF        10
2098 #define HCI_READ_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_READ_SYNCH_FLOW_CTRL_ENABLE_MASK)
2099
2100 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK    0x10
2101 #define HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF     10
2102 #define HCI_WRITE_SYNCH_FLOW_CTRL_ENABLE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNCH_FLOW_CTRL_ENABLE_MASK)
2103
2104 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK    0x20
2105 #define HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF     10
2106 #define HCI_SET_HOST_CTRLR_TO_HOST_FC_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_OFF] & HCI_SUPP_COMMANDS_SET_HOST_CTRLR_TO_HOST_FC_MASK)
2107
2108 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK          0x40
2109 #define HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF           10
2110 #define HCI_HOST_BUFFER_SIZE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_HOST_BUFFER_SIZE_MASK)
2111
2112 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK          0x80
2113 #define HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF           10
2114 #define HCI_HOST_NUM_COMPLETED_PKTS_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_OFF] & HCI_SUPP_COMMANDS_HOST_NUM_COMPLETED_PKTS_MASK)
2115
2116 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK      0x01
2117 #define HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF       11
2118 #define HCI_READ_LINK_SUP_TOUT_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_LINK_SUP_TOUT_MASK)
2119
2120 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK           0x02
2121 #define HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF            11
2122 #define HCI_WRITE_LINK_SUP_TOUT_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LINK_SUP_TOUT_MASK)
2123
2124 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK  0x04
2125 #define HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF   11
2126 #define HCI_READ_NUM_SUPP_IAC_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_OFF] & HCI_SUPP_COMMANDS_READ_NUM_SUPP_IAC_MASK)
2127
2128 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK       0x08
2129 #define HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF        11
2130 #define HCI_READ_CURRENT_IAC_LAP_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_READ_CURRENT_IAC_LAP_MASK)
2131
2132 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK    0x10
2133 #define HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF     11
2134 #define HCI_WRITE_CURRENT_IAC_LAP_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_OFF] & HCI_SUPP_COMMANDS_WRITE_CURRENT_IAC_LAP_MASK)
2135
2136 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK    0x20
2137 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF     11
2138 #define HCI_READ_PAGE_SCAN_PER_MODE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_PER_MODE_MASK)
2139
2140 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK          0x40
2141 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF           11
2142 #define HCI_WRITE_PAGE_SCAN_PER_MODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_PER_MODE_MASK)
2143
2144 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK          0x80
2145 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF           11
2146 #define HCI_READ_PAGE_SCAN_MODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_MODE_MASK)
2147
2148 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK      0x01
2149 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF       12
2150 #define HCI_WRITE_PAGE_SCAN_MODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_MODE_MASK)
2151
2152 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK           0x02
2153 #define HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF            12
2154 #define HCI_SET_AFH_CHNL_CLASS_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_OFF] & HCI_SUPP_COMMANDS_SET_AFH_CHNL_CLASS_MASK)
2155
2156 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK    0x10
2157 #define HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF     12
2158 #define HCI_READ_INQUIRY_SCAN_TYPE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_SCAN_TYPE_MASK)
2159
2160 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK    0x20
2161 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF     12
2162 #define HCI_WRITE_INQUIRY_SCAN_TYPE_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_SCAN_TYPE_MASK)
2163
2164 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK          0x40
2165 #define HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF           12
2166 #define HCI_READ_INQUIRY_MODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_MODE_MASK)
2167
2168 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK          0x80
2169 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF           12
2170 #define HCI_WRITE_INQUIRY_MODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_MODE_MASK)
2171
2172 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK      0x01
2173 #define HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF       13
2174 #define HCI_READ_PAGE_SCAN_TYPE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_READ_PAGE_SCAN_TYPE_MASK)
2175
2176 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK           0x02
2177 #define HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF            13
2178 #define HCI_WRITE_PAGE_SCAN_TYPE_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_OFF] & HCI_SUPP_COMMANDS_WRITE_PAGE_SCAN_TYPE_MASK)
2179
2180 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK  0x04
2181 #define HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF   13
2182 #define HCI_READ_AFH_CHNL_ASSESS_MODE_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CHNL_ASSESS_MODE_MASK)
2183
2184 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK       0x08
2185 #define HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF        13
2186 #define HCI_WRITE_AFH_CHNL_ASSESS_MODE_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_AFH_CHNL_ASSESS_MODE_MASK)
2187
2188 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK       0x08
2189 #define HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF        14
2190 #define HCI_READ_LOCAL_VER_INFO_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_VER_INFO_MASK)
2191
2192 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK       0x10
2193 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF        14
2194 #define HCI_READ_LOCAL_SUP_CMDS_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUP_CMDS_MASK)
2195
2196 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK    0x20
2197 #define HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF     14
2198 #define HCI_READ_LOCAL_SUPP_FEATURES_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_SUPP_FEATURES_MASK)
2199
2200 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK          0x40
2201 #define HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF           14
2202 #define HCI_READ_LOCAL_EXT_FEATURES_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_EXT_FEATURES_MASK)
2203
2204 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK          0x80
2205 #define HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF           14
2206 #define HCI_READ_BUFFER_SIZE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_BUFFER_SIZE_MASK)
2207
2208 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK      0x01
2209 #define HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF       15
2210 #define HCI_READ_COUNTRY_CODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_OFF] & HCI_SUPP_COMMANDS_READ_COUNTRY_CODE_MASK)
2211
2212 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK           0x02
2213 #define HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF            15
2214 #define HCI_READ_BD_ADDR_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_READ_BD_ADDR_OFF] & HCI_SUPP_COMMANDS_READ_BD_ADDR_MASK)
2215
2216 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK  0x04
2217 #define HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF   15
2218 #define HCI_READ_FAIL_CONTACT_CNTR_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_READ_FAIL_CONTACT_CNTR_MASK)
2219
2220 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK       0x08
2221 #define HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF        15
2222 #define HCI_RESET_FAIL_CONTACT_CNTR_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_OFF] & HCI_SUPP_COMMANDS_RESET_FAIL_CONTACT_CNTR_MASK)
2223
2224 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK    0x10
2225 #define HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF     15
2226 #define HCI_GET_LINK_QUALITY_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_GET_LINK_QUALITY_OFF] & HCI_SUPP_COMMANDS_GET_LINK_QUALITY_MASK)
2227
2228 #define HCI_SUPP_COMMANDS_READ_RSSI_MASK    0x20
2229 #define HCI_SUPP_COMMANDS_READ_RSSI_OFF     15
2230 #define HCI_READ_RSSI_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_READ_RSSI_OFF] & HCI_SUPP_COMMANDS_READ_RSSI_MASK)
2231
2232 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK          0x40
2233 #define HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF           15
2234 #define HCI_READ_AFH_CH_MAP_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_OFF] & HCI_SUPP_COMMANDS_READ_AFH_CH_MAP_MASK)
2235
2236 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK          0x80
2237 #define HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF           15
2238 #define HCI_READ_BD_CLOCK_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_BD_CLOCK_OFF] & HCI_SUPP_COMMANDS_READ_BD_CLOCK_MASK)
2239
2240 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK      0x01
2241 #define HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF       16
2242 #define HCI_READ_LOOPBACK_MODE_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_READ_LOOPBACK_MODE_MASK)
2243
2244 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK           0x02
2245 #define HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF            16
2246 #define HCI_WRITE_LOOPBACK_MODE_SUPPORTED(x)           ((x)[HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_LOOPBACK_MODE_MASK)
2247
2248 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK  0x04
2249 #define HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF   16
2250 #define HCI_ENABLE_DEV_UNDER_TEST_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_OFF] & HCI_SUPP_COMMANDS_ENABLE_DEV_UNDER_TEST_MASK)
2251
2252 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK       0x08
2253 #define HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF        16
2254 #define HCI_SETUP_SYNCH_CONN_SUPPORTED(x)       ((x)[HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_SETUP_SYNCH_CONN_MASK)
2255
2256 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK    0x10
2257 #define HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF     16
2258 #define HCI_ACCEPT_SYNCH_CONN_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ACCEPT_SYNCH_CONN_MASK)
2259
2260 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK    0x20
2261 #define HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF     16
2262 #define HCI_REJECT_SYNCH_CONN_SUPPORTED(x)    ((x)[HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_REJECT_SYNCH_CONN_MASK)
2263
2264 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK   0x01
2265 #define HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF    17
2266 #define HCI_READ_EXT_INQUIRY_RESP_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_READ_EXT_INQUIRY_RESP_MASK)
2267
2268 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK  0x02
2269 #define HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF   17
2270 #define HCI_WRITE_EXT_INQUIRY_RESP_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_OFF] & HCI_SUPP_COMMANDS_WRITE_EXT_INQUIRY_RESP_MASK)
2271
2272 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK   0x04
2273 #define HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF    17
2274 #define HCI_REFRESH_ENCRYPTION_KEY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_OFF] & HCI_SUPP_COMMANDS_REFRESH_ENCRYPTION_KEY_MASK)
2275
2276 /* Octet 17, bit 3 is reserved */
2277
2278 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK       0x10
2279 #define HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF        17
2280 #define HCI_SNIFF_SUB_RATE_CMD_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_OFF] & HCI_SUPP_COMMANDS_SNIFF_SUB_RATE_MASK)
2281
2282 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK   0x20
2283 #define HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF    17
2284 #define HCI_READ_SIMPLE_PAIRING_MODE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_READ_SIMPLE_PAIRING_MODE_MASK)
2285
2286 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK   0x40
2287 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF    17
2288 #define HCI_WRITE_SIMPLE_PAIRING_MODE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_MODE_MASK)
2289
2290 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK   0x80
2291 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF    17
2292 #define HCI_READ_LOCAL_OOB_DATA_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_DATA_MASK)
2293
2294 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK   0x01
2295 #define HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF    18
2296 #define HCI_READ_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_READ_INQUIRY_RESPONSE_TX_POWER_MASK)
2297
2298 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK   0x02
2299 #define HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF    18
2300 #define HCI_WRITE_INQUIRY_RESPONSE_TX_POWER_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_OFF] & HCI_SUPP_COMMANDS_WRITE_INQUIRY_RESPONSE_TX_POWER_MASK)
2301
2302 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK   0x04
2303 #define HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF    18
2304 #define HCI_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_READ_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK)
2305
2306 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK   0x08
2307 #define HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF    18
2308 #define HCI_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_OFF] & HCI_SUPP_COMMANDS_WRITE_DEFAULT_ERRONEOUS_DATA_REPORTING_MASK)
2309
2310 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK   0x80
2311 #define HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF    18
2312 #define HCI_IO_CAPABILITY_REQUEST_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAPABILITY_REQUEST_REPLY_MASK)
2313
2314 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK   0x01
2315 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF    19
2316 #define HCI_USER_CONFIRMATION_REQUEST_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_REPLY_MASK)
2317
2318 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK   0x02
2319 #define HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF    19
2320 #define HCI_USER_CONFIRMATION_REQUEST_NEG_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_CONFIRMATION_REQUEST_NEG_REPLY_MASK)
2321
2322 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK   0x04
2323 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF    19
2324 #define HCI_USER_PASSKEY_REQUEST_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_REPLY_MASK)
2325
2326 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK   0x08
2327 #define HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF    19
2328 #define HCI_USER_PASSKEY_REQUEST_NEG_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_USER_PASSKEY_REQUEST_NEG_REPLY_MASK)
2329
2330 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK   0x10
2331 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF    19
2332 #define HCI_REMOTE_OOB_DATA_REQUEST_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_REPLY_MASK)
2333
2334 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK       0x20
2335 #define HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF        19
2336 #define HCI_WRITE_SIMPLE_PAIRING_DBG_MODE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SIMPLE_PAIRING_DBG_MODE_MASK)
2337
2338 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK   0x40
2339 #define HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF    19
2340 #define HCI_ENHANCED_FLUSH_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_ENHANCED_FLUSH_OFF] & HCI_SUPP_COMMANDS_ENHANCED_FLUSH_MASK)
2341
2342 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK       0x80
2343 #define HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF        19
2344 #define HCI_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_DATA_REQUEST_NEG_REPLY_MASK)
2345
2346 /* Supported Commands (Byte 20) */
2347 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK       0x04
2348 #define HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF        20
2349 #define HCI_SEND_NOTIF_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_OFF] & HCI_SUPP_COMMANDS_SEND_KEYPRESS_NOTIF_MASK)
2350
2351 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK      0x08
2352 #define HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF       20
2353 #define HCI_IO_CAP_REQ_NEG_REPLY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_OFF] & HCI_SUPP_COMMANDS_IO_CAP_REQ_NEG_REPLY_MASK)
2354
2355 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK      0x10
2356 #define HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF       20
2357 #define HCI_READ_ENCR_KEY_SIZE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_ENCR_KEY_SIZE_MASK)
2358
2359 /* Supported Commands (Byte 21) */
2360 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK   0x01
2361 #define HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF    21
2362 #define HCI_CREATE_PHYSICAL_LINK_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_PHYSICAL_LINK_MASK)
2363
2364 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK   0x02
2365 #define HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF    21
2366 #define HCI_ACCEPT_PHYSICAL_LINK_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_PHYSICAL_LINK_MASK)
2367
2368 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK   0x04
2369 #define HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF    21
2370 #define HCI_DISCONNECT_PHYSICAL_LINK_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_PHYSICAL_LINK_MASK)
2371
2372 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK   0x08
2373 #define HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF    21
2374 #define HCI_CREATE_LOGICAL_LINK_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_CREATE_LOGICAL_LINK_MASK)
2375
2376 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK   0x10
2377 #define HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF    21
2378 #define HCI_ACCEPT_LOGICAL_LINK_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_ACCEPT_LOGICAL_LINK_MASK)
2379
2380 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK   0x20
2381 #define HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF    21
2382 #define HCI_DISCONNECT_LOGICAL_LINK_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_OFF] & HCI_SUPP_COMMANDS_DISCONNECT_LOGICAL_LINK_MASK)
2383
2384 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK   0x40
2385 #define HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF    21
2386 #define HCI_LOGICAL_LINK_CANCEL_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_OFF] & HCI_SUPP_COMMANDS_LOGICAL_LINK_CANCEL_MASK)
2387
2388 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK       0x80
2389 #define HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF        21
2390 #define HCI_FLOW_SPEC_MODIFY_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_OFF] & HCI_SUPP_COMMANDS_FLOW_SPEC_MODIFY_MASK)
2391
2392 /* Supported Commands (Byte 22) */
2393 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK   0x01
2394 #define HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF    22
2395 #define HCI_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_READ_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK)
2396
2397 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK   0x02
2398 #define HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF    22
2399 #define HCI_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_LOGICAL_LINK_ACCEPT_TIMEOUT_MASK)
2400
2401 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK   0x04
2402 #define HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF    22
2403 #define HCI_SET_EVENT_MASK_PAGE_2_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_OFF] & HCI_SUPP_COMMANDS_SET_EVENT_MASK_PAGE_2_MASK)
2404
2405 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK   0x08
2406 #define HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF    22
2407 #define HCI_READ_LOCATION_DATA_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCATION_DATA_MASK)
2408
2409 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK   0x10
2410 #define HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF    22
2411 #define HCI_WRITE_LOCATION_DATA_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_OFF] & HCI_SUPP_COMMANDS_WRITE_LOCATION_DATA_MASK)
2412
2413 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK   0x20
2414 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF    22
2415 #define HCI_READ_LOCAL_AMP_INFO_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_INFO_MASK)
2416
2417 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK   0x40
2418 #define HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF    22
2419 #define HCI_READ_LOCAL_AMP_ASSOC_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_AMP_ASSOC_MASK)
2420
2421 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK   0x80
2422 #define HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF    22
2423 #define HCI_WRITE_REMOTE_AMP_ASSOC_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_OFF] & HCI_SUPP_COMMANDS_WRITE_REMOTE_AMP_ASSOC_MASK)
2424
2425 /* Supported Commands (Byte 23) */
2426 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK   0x01
2427 #define HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF    23
2428 #define HCI_READ_FLOW_CONTROL_MODE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_READ_FLOW_CONTROL_MODE_MASK)
2429
2430 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK   0x02
2431 #define HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF    23
2432 #define HCI_WRITE_FLOW_CONTROL_MODE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_FLOW_CONTROL_MODE_MASK)
2433
2434 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK   0x04
2435 #define HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF    23
2436 #define HCI_READ_DATA_BLOCK_SIZE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_OFF] & HCI_SUPP_COMMANDS_READ_DATA_BLOCK_SIZE_MASK)
2437
2438 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK   0x20
2439 #define HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF    23
2440 #define HCI_ENABLE_AMP_RCVR_REPORTS_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_OFF] & HCI_SUPP_COMMANDS_ENABLE_AMP_RCVR_REPORTS_MASK)
2441
2442 #define HCI_SUPP_COMMANDS_AMP_TEST_END_MASK   0x40
2443 #define HCI_SUPP_COMMANDS_AMP_TEST_END_OFF    23
2444 #define HCI_AMP_TEST_END_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_AMP_TEST_END_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_END_MASK)
2445
2446 #define HCI_SUPP_COMMANDS_AMP_TEST_MASK   0x80
2447 #define HCI_SUPP_COMMANDS_AMP_TEST_OFF    23
2448 #define HCI_AMP_TEST_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_AMP_TEST_OFF] & HCI_SUPP_COMMANDS_AMP_TEST_MASK)
2449
2450 /* Supported Commands (Byte 24) */
2451 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK   0x01
2452 #define HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF    24
2453 #define HCI_READ_TRANSMIT_POWER_LEVEL_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_OFF] & HCI_SUPP_COMMANDS_READ_TRANSMIT_POWER_LEVEL_MASK)
2454
2455 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK   0x04
2456 #define HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF    24
2457 #define HCI_READ_BE_FLUSH_TOUT_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_BE_FLUSH_TOUT_MASK)
2458
2459 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK   0x08
2460 #define HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF    24
2461 #define HCI_WRITE_BE_FLUSH_TOUT_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_BE_FLUSH_TOUT_MASK)
2462
2463 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK   0x10
2464 #define HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF    24
2465 #define HCI_SHORT_RANGE_MODE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_OFF] & HCI_SUPP_COMMANDS_SHORT_RANGE_MODE_MASK)
2466
2467 /* LE commands TBD
2468 ** Supported Commands (Byte 24 continued)
2469 ** Supported Commands (Byte 25)
2470 ** Supported Commands (Byte 26)
2471 ** Supported Commands (Byte 27)
2472 ** Supported Commands (Byte 28)
2473 */
2474
2475 /* Supported Commands (Byte 29) */
2476 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK     0x08
2477 #define HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF      29
2478 #define HCI_READ_ENH_SETUP_SYNCH_CONN_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_SETUP_SYNCH_CONN_MASK)
2479
2480 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK    0x10
2481 #define HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF     29
2482 #define HCI_READ_ENH_ACCEPT_SYNCH_CONN_SUPPORTED(x)     ((x)[HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_OFF] & HCI_SUPP_COMMANDS_ENH_ACCEPT_SYNCH_CONN_MASK)
2483
2484 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK        0x20
2485 #define HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF         29
2486 #define HCI_READ_LOCAL_CODECS_SUPPORTED(x)              ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_CODECS_MASK)
2487
2488 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK      0x40
2489 #define HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF       29
2490 #define HCI_SET_MWS_CHANNEL_PARAMETERS_SUPPORTED(x)     ((x)[HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_OFF] & HCI_SUPP_COMMANDS_SET_MWS_CHANN_PARAM_MASK)
2491
2492 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK       0x80
2493 #define HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF        29
2494 #define HCI_SET_EXTERNAL_FRAME_CONFIGURATION_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_OFF] & HCI_SUPP_COMMANDS_SET_EXT_FRAME_CONF_MASK)
2495
2496
2497 /* Supported Commands (Byte 30) */
2498 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK     0x01
2499 #define HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF      30
2500 #define HCI_SET_MWS_SIGNALING_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SIGNALING_MASK)
2501
2502 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK   0x02
2503 #define HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF    30
2504 #define HCI_SET_MWS_TRANSPORT_LAYER_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_OFF] & HCI_SUPP_COMMANDS_SET_MWS_TRANS_LAYER_MASK)
2505
2506 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK   0x04
2507 #define HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF    30
2508 #define HCI_SET_MWS_SCAN_FREQUENCY_TABLE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_OFF] & HCI_SUPP_COMMANDS_SET_MWS_SCAN_FREQ_TABLE_MASK)
2509
2510 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK      0x08
2511 #define HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF    30
2512 #define HCI_GET_MWS_TRANS_LAYER_CFG_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_OFF] & HCI_SUPP_COMMANDS_GET_TRANS_LAYER_CONF_MASK)
2513
2514 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK      0x10
2515 #define HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF       30
2516 #define HCI_SET_MWS_PATTERN_CONFIGURATION_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_OFF] & HCI_SUPP_COMMANDS_SET_MWS_PATTERN_CONF_MASK)
2517
2518 /* Supported Commands (Byte 30 bit 5) */
2519 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK         0x20
2520 #define HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF          30
2521 #define HCI_SET_TRIG_CLK_CAP_SUPPORTED(x)               ((x)[HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_OFF] & HCI_SUPP_COMMANDS_SET_TRIG_CLK_CAP_MASK)
2522
2523
2524 /* Supported Commands (Byte 30 bit 6-7) */
2525 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE             0x06
2526 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF         30
2527 #define HCI_TRUNCATED_PAGE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE)
2528
2529 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL             0x07
2530 #define HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF         30
2531 #define HCI_TRUNCATED_PAGE_CANCEL_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL_OFF] & HCI_SUPP_COMMANDS_TRUNCATED_PAGE_CANCEL)
2532
2533 /* Supported Commands (Byte 31 bit 6-7) */
2534 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST             0x00
2535 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF         31
2536 #define HCI_SET_CONLESS_SLAVE_BRCST_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST)
2537
2538 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE             0x01
2539 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF         31
2540 #define HCI_SET_CONLESS_SLAVE_BRCST_RECEIVE_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_RECEIVE)
2541
2542 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN             0x02
2543 #define HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF         31
2544 #define HCI_START_SYNC_TRAIN_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_START_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_START_SYNC_TRAIN)
2545
2546 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN             0x03
2547 #define HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF         31
2548 #define HCI_RECEIVE_SYNC_TRAIN_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN_OFF] & HCI_SUPP_COMMANDS_RECEIVE_SYNC_TRAIN)
2549
2550 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR             0x04
2551 #define HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF         31
2552 #define HCI_SET_RESERVED_LT_ADDR_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_SET_RESERVED_LT_ADDR)
2553
2554 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR             0x05
2555 #define HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF         31
2556 #define HCI_DELETE_RESERVED_LT_ADDR_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR_OFF] & HCI_SUPP_COMMANDS_DELETE_RESERVED_LT_ADDR)
2557
2558 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA             0x06
2559 #define HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF         31
2560 #define HCI_SET_CONLESS_SLAVE_BRCST_DATA_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA_OFF] & HCI_SUPP_COMMANDS_SET_CONLESS_SLAVE_BRCST_DATA)
2561
2562 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM             0x07
2563 #define HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF         31
2564 #define HCI_READ_SYNC_TRAIN_PARAM_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_READ_SYNC_TRAIN_PARAM)
2565
2566 /* Supported Commands (Byte 32 bit 0) */
2567 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM             0x00
2568 #define HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF         32
2569 #define HCI_WRITE_SYNC_TRAIN_PARAM_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM_OFF] & HCI_SUPP_COMMANDS_WRITE_SYNC_TRAIN_PARAM)
2570
2571 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK   0x02
2572 #define HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF    32
2573 #define HCI_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_OFF] & HCI_SUPP_COMMANDS_REMOTE_OOB_EXTENDED_DATA_REQUEST_REPLY_MASK)
2574
2575 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK    0x04
2576 #define HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF     32
2577 #define HCI_READ_SECURE_CONNS_SUPPORT_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_READ_SECURE_CONNS_SUPPORT_MASK)
2578
2579 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK   0x08
2580 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF    32
2581 #define HCI_WRITE_SECURE_CONNS_SUPPORT_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNS_SUPPORT_MASK)
2582
2583 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK    0x10
2584 #define HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF     32
2585 #define HCI_READ_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_READ_AUTHENT_PAYLOAD_TOUT_MASK)
2586
2587 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK   0x20
2588 #define HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF    32
2589 #define HCI_WRITE_AUTHENT_PAYLOAD_TOUT_SUPPORTED(x)  ((x)[HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_OFF] & HCI_SUPP_COMMANDS_WRITE_AUTHENT_PAYLOAD_TOUT_MASK)
2590
2591 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK 0x40
2592 #define HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF  32
2593 #define HCI_READ_LOCAL_OOB_EXTENDED_DATA_SUPPORTED(x)   ((x)[HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_OFF] & HCI_SUPP_COMMANDS_READ_LOCAL_OOB_EXTENDED_DATA_MASK)
2594
2595 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK   0x80
2596 #define HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF    32
2597 #define HCI_WRITE_SECURE_CONNECTIONS_TEST_MODE_SUPPORTED(x) ((x)[HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_OFF] & HCI_SUPP_COMMANDS_WRITE_SECURE_CONNECTIONS_TEST_MODE_MASK)
2598
2599 /* supported LE remote control connection parameter request reply */
2600 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK          0x10
2601 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF           33
2602 #define HCI_LE_RC_CONN_PARAM_UPD_RPY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_OFF] & HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_RPY_MASK)
2603
2604 #define HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK          0x20
2605 #define HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF           33
2606 #define HCI_LE_RC_CONN_PARAM_UPD_NEG_RPY_SUPPORTED(x)      ((x)[HCI_SUPP_COMMANDS_LE_RC_CONN_PARAM_UPD_NEG_RPY_OFF] & HCI_SUPP_COMMANDS_RLE_RC_CONN_PARAM_UPD_NEG_RPY_MASK)
2607
2608 #endif
2609